- 您現(xiàn)在的位置：買賣IC網 > PDF目錄369902 > MC68HC05P8EVS (Motorola, Inc.) HCMOS MICROCONTROLLER UNIT PDF資料下載
參數(shù)資料
| 型號： | MC68HC05P8EVS |
| 廠商： | Motorola, Inc. |
| 英文描述： | HCMOS MICROCONTROLLER UNIT |
| 中文描述： | HCMOS微控制器 |
| 文件頁數(shù)： | 57/82頁 |
| 文件大小： | 327K |
| 代理商： | MC68HC05P8EVS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁
MC68HC705J2
Rev. 2
INSTRUCTION SET
MOTOROLA
10-5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
10.2.2 Read-Modify-Write Instructions
These instructions read a memory location or a register, modify its contents, and
write the modified value back to the memory location or to the register. The test for
negative or zero instruction (TST) is an exception to the read-modify-write
sequence because it does not write a replacement value.
Table 10-2
lists the
read-modify-write instructions.
10.2.3 Jump/Branch Instructions
Jump instructions allow the CPU to interrupt the normal sequence of the program
counter. The unconditional jump instruction (JMP) and the jump to subroutine
instruction (JSR) have no register operand. Branch instructions allow the CPU to
interrupt the normal sequence of the program counter when a test condition is met.
If the test condition is not met, the branch is not performed. All branch instructions
use relative addressing.
Bit test and branch instructions cause a branch based on the state of any readable
bit in the first 256 memory locations. These three-byte instructions use a
combination of direct addressing and relative addressing. The direct address of the
byte to be tested is in the byte following the opcode. The third byte is the signed
offset byte. The CPU finds the conditional branch destination by adding the third
byte to the program counter if the specified bit tests true. The bit to be tested and
Table 10-2. Read-Modify-Write Instructions
Instruction
Mnemonic
Arithmetic Shift Left
ASL
Arithmetic Shift Right
ASR
Clear Bit in Memory
BCLR
Set Bit in Memory
BSET
Clear
CLR
Complement (One’s Complement)
COM
Decrement
DEC
Increment
INC
Logical Shift Left
LSL
Logical Shift Right
LSR
Negate (Two’s Complement)
NEG
Rotate Left through Carry Bit
ROL
Rotate Right through Carry Bit
ROR
Test for Negative or Zero
TST
相關PDF資料 |
PDF描述 |
|---|---|
| MC68HC705J2 | HCMOS MICROCONTROLLER UNIT |
| MC68HC705J2CP | HCMOS MICROCONTROLLER UNIT |
| MC68HC705J2DW | HCMOS MICROCONTROLLER UNIT |
| MC68HC705J2P | HCMOS MICROCONTROLLER UNIT |
| MC68HC705J2S | HCMOS MICROCONTROLLER UNIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05P8P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P9 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P9A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P9ACDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P9ACP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
發(fā)布緊急采購，3分鐘左右您將得到回復。