參數(shù)資料
型號(hào): MC68HC05P4ADW
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 11/72頁(yè)
文件大小: 400K
代理商: MC68HC05P4ADW
Introduction
MC68HC05P4A Data Sheet, Rev. 7.1
Freescale Semiconductor
19
$0010
Unimplemented
$0011
Unimplemented
$0012
Timer Control Register
(TCR)
Read:
ICIE
OCIE
TOIE
00
0
IEDG
OLVL
Write:
Reset:
0
$0013
Timer Status Register
(TSR)
Read:
ICF
OCF
TOF
0
Write:
Reset:
U
0
$0014
Input Capture MSB
(ICRH)
Read:
ICRH7
ICRH6
ICRH5
ICRH4
ICRH3
ICRH2
ICRH1
ICRH0
Write:
Reset:
Unaffected by reset
$0015
Input Capture LSB
(ICRL)
Read:
ICRL7
ICRL6
ICRL5
ICRL4
ICRL3
ICRL2
ICRL1
ICRL0
Write:
Reset:
Unaffected by reset
$0016
Output Compare MSB
(OCRH)
Read: OCRH7
OCRH6
OCRH5
OCRH4
OCRH3
OCRH2
OCRH1
OCRH0
Write:
Reset:
Unaffected by reset
$0017
Output Compare LSB
(OCRL)
Read:
OCRL7
OCRL6
OCRL5
OCRL4
OCRL3
OCRL2
OCRL1
OCRL0
Write:
Reset:
Unaffected by reset
$0018
Counter MSB
(CRH)
Read:
CRH7
CRH6
CRH5
CRH4
CRH3
CRH2
CRH1
CRH0
Write:
Reset:
Unaffected by reset
$0019
Counter LSB
(CRL)
Read:
CRL7
CRL6
CRL5
CRL4
CRL3
CRL2
CRL1
CRL0
Write:
Reset:
Unaffected by reset
$001A
Dual Timer MSB (DTMH)
Counter Alternate Register
Read: DTMH7
DTMH6
DTMH5
DTMH4
DTMH3
DTMH2
DTMH1
DTMH0
Write:
Reset:
Unaffected by reset
$001B
Dual Timer LSB (DTML)
Counter Alternate Register
Read:
DTML7
DTML6
DTML5
DTML4
DTML3
DTML2
DTML1
DTML0
Write:
Reset:
Unaffected by reset
$001C
Unimplemented
$001D
Unimplemented
$001E
Unimplemented
$001F
Reserved
R
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
U = Unaffected
X = Indeterminate
Figure 2-2. I/O Registers for the MC68HC05P4A (Sheet 2 of 2)
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