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參數(shù)資料
| 型號： | MC68HC05P4ACDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | PLASTIC, SOIC-28 |
| 文件頁數(shù)： | 51/102頁 |
| 文件大小： | 1085K |
| 代理商： | MC68HC05P4ACDW |
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Simple Serial Input/Output Port (SIOP)
Technical Data
MC68HC05P4A — Rev. 7.0
52
Simple Serial Input/Output Port (SIOP)
MOTOROLA
Figure 7-1. SIOP Block Diagram
7.3 Signal Format
The SIOP signal format is described here.
7.3.1 Serial Clock (SCK)
The state of SCK between transmissions must be logic 1. The first falling
edge of SCK signals the beginning of a transmission. At this time, the
first bit of received data is accepted at the SDI pin and the first bit of
transmitted data is presented at the SDO pin. Data is captured at the SDI
pin on the rising edge of SCK. Subsequent falling edges shift the data
and accept or present the next bit. The transmission is ended upon the
eighth rising edge of SCK. The maximum frequency of SCK in slave
mode is equal to E (bus clock) divided by four. That is, for a 4-MHz
oscillator input, E becomes 2 MHz and the maximum SCK frequency is
0.5 MHz. There is no minimum SCK frequency.
In master mode, the format is identical except that the SCK pin is an
output and the shift clock now originates internally. The master mode
transmission frequency is fixed at E/4.
8-BIT SHIFT REGISTER
D
Q
R
C
RESET
SDO
SCK
SDI
MSB/LSB MASK OPTION
DATA BUS
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05P4DW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P4P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P6 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P6_1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P8 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
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