
GENERAL RELEASE SPECIFICATION
December 11, 1996
MOTOROLA
INSTRUCTION SET
MC68HC05J5
9-4
REV 1.1
tables anywhere in the memory space. Short indexed accesses are single byte
instructions; the longest instructions (three bytes) permit accessing tables
throughout memory. Short and long absolute addressing is also included. One- or
two-byte direct addressing instructions access all data bytes in most applications.
Extended addressing permits jump instructions to reach all memory.
The term "effective address" (EA) is used in describing the various addressing
modes. Effective address is dened as the address from which the argument for
an instruction is fetched or stored.
9.6.1 Immediate
In the immediate addressing mode, the operand is contained in the byte immedi-
ately following the opcode. The immediate addressing mode is used to access
constants that do not change during program execution (e.g., a constant used to
initialize a loop counter).
9.6.2 Direct
In the direct addressing mode, the effective address of the argument is contained
in a single byte following the opcode byte. Direct addressing allows the user to
directly address the lowest 256 bytes in memory with single two-byte instructions.
9.6.3 Extended
In the extended addressing mode, the effective address of the argument is con-
tained in the two bytes following the opcode byte. Instructions with extended
addressing mode are capable of referencing arguments anywhere in memory with
a single three-byte instruction. When using the Motorola assembler, the user need
not specify whether an instruction uses direct or extended addressing. The
assembler automatically selects the shortest form of the instruction.
9.6.4 Relative
The relative addressing mode is only used in branch instructions. In relative
addressing, the contents of the 8-bit signed offset byte (which is the last byte of
the instruction) is added to the PC if, and only if, the branch conditions are true.
Otherwise, control proceeds to the next instruction. The span of relative address-
ing is from -128 to +127 from the address of the next opcode. The programmer
need not calculate the offset when using the Motorola assembler, since it calcu-
lates the proper offset and checks to see that it is within the span of the branch.
9.6.5 Indexed, No Offset
In the indexed, no offset addressing mode, the effective address of the argument
is contained in the 8-bit index register. This addressing mode can access the rst
256 memory locations. These instructions are only one byte long. This mode is
often used to move a pointer through a table or to hold the address of a frequently
referenced RAM or I/O location.