參數(shù)資料
型號(hào)： MC68HC05F4FB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 70/130頁
文件大?。?/td> 10504K
代理商： MC68HC05F4FB
4-6
MC68HC05F4
PARALLEL INPUT/OUTPUT PORTS
4
4.6
Port registers
The following sections explain in detail the individual bits in the data and control registers
associated with the ports.
4.6.1
Port data registers (Ports A, B, C and D)
Each bit of port A – port D can be congured as input or output via the corresponding data
direction bit in the port data direction register (DDRx).
Reset does not affect the state of the port A – port D data registers.
4.6.2
Data direction registers (DDRA, DDRB, DDRC and DDRD)
Writing a ‘1’ to any bit congures the corresponding port pin as an output; conversely, writing any
bit to ‘0’ congures the corresponding port pin as an input.
Reset clears these registers, thus conguring all port pins as inputs.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port A data (PORTA)
$0000
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
undened
Port B data (PORTB)
$0001
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
undened
Port C data (PORTC)
$0002
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
undened
Port D data (PORTD)
$0003
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
undened
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port A data direction (DDRA)
$0004
0000 0000
Port B data direction (DDRB)
$0005
0000 0000
Port C data direction (DDRC)
$0006
0000 0000
Port D data direction (DDRD)
$0007
0000 0000
TPG
40
05F4Book Page 6 Tuesday, August 5, 1997 1:10 pm
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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