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| 型號(hào)： | MC68HC05F4FB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 50/130頁(yè) |
| 文件大?。?/td> | 10504K |
| 代理商： | MC68HC05F4FB |
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2-4
MC68HC05F4
MODES OF OPERATION AND PIN DESCRIPTIONS
2
SC — System clock option
1 (set)
–
Bus clock fOP equals fOSC1/4 (slow mode)
0 (clear) –
Bus clock fOP equals fOSC1/2 (normal operation)
After power on reset the internal bus frequency is fOSC1/2. If the SC (system clock) bit is set, the
bus frequency is reduced to fOSC1/4. However, this does not affect the DTMF generator, which
continues to operate at fOSC1/2.
IRQ — Interrupt sensitivity
IRQ edge or level sensitivity
1 (set)
–
IRQ input edge and level sensitive
0 (clear) –
IRQ input edge sensitive
2.4
Pin descriptions
2.4.1
VDD and VSS
Power is supplied to the microcomputer via these two pins. VDD is the positive supply pin and VSS is
the ground pin.
It is in the nature of CMOS designs that very fast signal transitions occur on the MCU pins. These
short rise and fall times place very high short-duration current demands on the power supply. To
prevent noise problems, special care must be taken to provide good power supply bypassing at
the MCU. Bypass capacitors should have good high-frequency characteristics and be as close to
the MCU as possible. Bypassing requirements vary, depending on how heavily the MCU pins are
loaded.
2.4.2
IRQ
This is an input-only pin for external interrupt sources. Interrupt triggering is selected using the
IRQ bit in the SOR register, to be one of two options: either edge and level sensitive or edge
sensitive only.
The IRQ pin contains an internal Schmitt trigger as part of its input to improve noise immunity.
TPG
22
05F4Book Page 4 Tuesday, August 5, 1997 1:10 pm
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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