參數(shù)資料
型號: MC68HC05F4FB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 100/130頁
文件大?。?/td> 10504K
代理商: MC68HC05F4FB
MC68HC05F4
7-5
DTMF/MELODY GENERATOR
7
The state of the TNO pin depends on the value of the TNOE bit. After a RESET, the TNOE is
cleared and the TNO pin is tristate. When TNOE is set, the TNO output is activated. If the TGER
and TGEC bits are held low and TNOE is set, the dc offset of VDD/2 appears at TNO pin. In STOP
mode, the TNX pin is high and the TNO pin is tristate.
When both MS1 and MS0 are set (square wave 3), the generator can generate both single tone
melody at the column path, and ToneX at the row path simultaneously.
TGER — Tone generator enable row path
1 (set)
Row path on
0 (clear) –
Row path off
TGEC — Tone generator enable column path
1 (set)
Column path on
0 (clear) –
Column path off
TNOE — Tone output enable
1 (set)
TNO on
0 (clear) –
TNO off
.
Table 7-1 Bit description for DTMF generation
FCR
register
FCC
register
Tone
Standard
frequency
(Hz)
Tone output
frequency (Hz)
Frequency
deviation
$00
fR1
697.0
694.8
0.32
$01
fR2
770.0
770.1
0.02
$02
fR3
852.0
854.2
0.03
$03
fR4
941.0
940.0
0.11
$10
fC1
1209.0
1206.0
0.244
$11
fC2
1336.0
1331.7
0.324
$12
fC3
1477.0
1486.5
0.645
$13
fC4
1633.0
1639.0
0.367
Note: The legal values in the FCR register column are illegal to the FCC register,
and vice versa. An input of illegal values to these registers will produce a
high at TNX output and VDD/2 at TNO output (TNOE = 1)
TPG
67
05F4Book Page 5 Tuesday, August 5, 1997 1:10 pm
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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