- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45220 > MC68HC05E6MDWR2 (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 PDF資料下載
參數(shù)資料
| 型號： | MC68HC05E6MDWR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | PLASTIC, SOIC-28 |
| 文件頁數(shù)： | 34/140頁 |
| 文件大?。?/td> | 1141K |
| 代理商： | MC68HC05E6MDWR2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁
Glossary
MC68HC05E6 — Rev. 1.0
MOTOROLA
Glossary
129
free-running counter — A device that counts from zero to a predetermined number, then rolls
over to zero and begins counting again.
full-duplex transmission — Communication on a channel in which data can be sent and
received simultaneously.
H — The upper byte of the 16-bit index register (H:X) in the CPU08.
H — The half-carry bit in the condition code register of the CPU08. This bit indicates a carry from
the low-order four bits of the accumulator value to the high-order four bits. The half-carry
bit is required for binary-coded decimal arithmetic operations. The decimal adjust
accumulator (DAA) instruction uses the state of the H and C bits to determine the
appropriate correction factor.
hexadecimal — Base 16 numbering system that uses the digits 0 through 9 and the letters A
through F.
high byte — The most significant eight bits of a word.
illegal address — An address not within the memory map
illegal opcode — A nonexistent opcode.
I — The interrupt mask bit in the condition code register of the CPU08. When I is set, all interrupts
are disabled.
index register (H:X) — A 16-bit register in the CPU08. The upper byte of H:X is called H. The
lower byte is called X. In the indexed addressing modes, the CPU uses the contents of
H:X to determine the effective address of the operand. H:X can also serve as a temporary
data storage location.
input/output (I/O) — Input/output interfaces between a computer system and the external world.
A CPU reads an input to sense the level of an external signal and writes to an output to
change the level on an external signal.
instructions — Operations that a CPU can perform. Instructions are expressed by programmers
as assembly language mnemonics. A CPU interprets an opcode and its associated
operand(s) and instruction.
interrupt — A temporary break in the sequential execution of a program to respond to signals
from peripheral devices by executing a subroutine.
interrupt request — A signal from a peripheral to the CPU intended to cause the CPU to
execute a subroutine.
I/O — See “input/output (I/0).”
IRQ — See "external interrupt module (IRQ)."
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05F4FB | 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05F5FN | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05F5P | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40 |
| MC68HC05F5CFN | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05F8B | 8-BIT, MROM, 1.8 MHz, MICROCONTROLLER, PDIP56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05E6MFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05E6VDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05E6VFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05F32 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:a member of the M68HC05 family of HCMOS |
| MC68HC05F32CFU | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:a member of the M68HC05 family of HCMOS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。