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參數(shù)資料
| 型號(hào)： | MC68HC05E0 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 4 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁(yè)數(shù)： | 52/96頁(yè) |
| 文件大?。?/td> | 970K |
| 代理商： | MC68HC05E0 |
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6
MOTOROLA
6-4
MC68HC05E0
PARALLEL INPUT/OUTPUT PORTS
6.3
Port D Alternate Functions
All Port D lines can be recongured to provide the signals needed to interface with external
memory (see Table 6-1).
R/W is the Read/Write signal which is active low only during the high phase of P02 and stays high
during the low phase of P02.
The chip select signals CS2 and CS3 are active low and are only active during the high phase of
P02.
LIR is an output signal which goes low only during the first P02 clock cycle of each instruction, and
remains low for the duration of that cycle. It is intended for use during debugging and emulation.
Figure 6-2 Port C Wake-up Function
Wake-up
Phase Register
($0014)
IRQB
INTX
Real Time
Interrupt
WAKF
Wake-up
Enable Register
($0013)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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