參數(shù)資料
型號: MC68HC05CJ4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 95/114頁
文件大小: 361K
代理商: MC68HC05CJ4FB
GENERAL RELEASE SPECIFICATION
MC68HC(7)05CJ4
TIMER 1
MOTOROLA
Rev. 2.1
11-5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
set or clear. The input capture register always contains the free-running counter
value that corresponds to the most recent input capture.
After a read of the input capture register ($14) MSB, the counter transfer is inhibited
until the LSB ($15) is also read. This characteristic causes the time used in the
input capture software routine and its interaction with the main program to
determine the minimum pulse period.
A read of the input capture register LSB ($15) does not inhibit the free-running
counter transfer since they occur on opposite edges of the internal bus clock.
Figure 11-3. Timer 1 Input Capture Operation
TCAP
PIN
COUNTER LOW BYTE
COUNTER HIGH BYTE
15
8
70
15
8
70
16-BIT INPUT CAPTURE REGISTER
INT
LATCH
EDGE SELECT
AND DETECT
ICF
ICIE
IEDG
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