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參數(shù)資料
| 型號： | MC68EN302CPV20BT |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-144 |
| 文件頁數(shù)： | 82/128頁 |
| 文件大?。?/td> | 641K |
| 代理商： | MC68EN302CPV20BT |
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ETHERNET Controller
4-18
MC68EN302 REFERENCE MANUAL
MOTOROLA
CSL—Carrier Sense Lost, written by Ethernet controller (only valid if L = 1).
Carrier sense dropped out or was never asserted during a collision free frame transmission.
Data Length, written by user.
Data length is the number of octets the Ethernet controller should transmit from this BD’s
data buffer. It is never modified by the Ethernet controller. The value of this field must be
greater than zero.
Tx Buffer Pointer, written by user.
The transmit buffer pointer containing the address of the associated data buffer, may be
even or odd. The buffer must reside in memory external to the MC68EN302. This value is
never modified by the Ethernet controller.
4.3 DMA AND BUFFER DESCRIPTOR LOGIC
The DMA and buffer descriptor modules transfer data between external memory and the TX/
RX FIFOs.
4.3.1 BUFFER DESCRIPTOR LOGIC
Buffer descriptors are stored in the on-chip dual-port RAM. The RAM is sufficient to store
128 buffer descriptors of 4 sixteen-bit-words. The features of the BD circuitry are as follows:
Flexible Buffer Descriptor allocation between transmit and receive;
Multiple buffers per frame
Transmit buffers may start on any byte boundary, Receive buffers must start on even
byte boundaries.
Maximum Receive Buffer size is user controllable;
The Buffer Descriptor space is divided between transmit and receive in various
configurations depending on the value of BDSIZE in the EDMA register. Table 4-2 shows
the starting and ending addresses (offset from MOBA) in the BD RAM for the four options.
The Maximum Receive Buffer Length field (MRBL) in the EMRBLR register determines the
default length of all receive buffers besides the last buffer of a frame (the last buffer is usually
shorter in length than the preceding buffers).
On the transmit side, the MC68EN302 may have up to two separate frames with open
buffers at a specific point in time. While the first frame completes the transmit process, DMA
Table 4-2. BD RAM Address Ranges
BDSIZE
TRANSMIT BUFFER
DESCRIPTOR RANGE
RECEIVE BUFFER
DESCRIPTOR RANGE
NUMBER OF TRANSMIT
BUFFERS
NUMBER OF RECEIVE
BUFFERS
$00
$C00 - $C3F
$C40 - $FFF
8
120
$01
$C00 - $C7F
$C80 - $FFF
16
112
$10
$C00 - $CFF
$D00 - $FFF
32
96
$11
$C00 - $DFF
$E00 - $FFF
64
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68EN302PV20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Multiprotocol Processor with Ethernet |
| MC68EN302PV20BT | 功能描述:IC MPU MULTI-PROTOCOL 144-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| MC68EN302PV25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Multiprotocol Processor with Ethernet |
| MC68EN302PV25BT | 功能描述:IC MPU MULTI-PROTOCOL 144-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| MC68EN360AI25L | 功能描述:微處理器 - MPU QUICC ETHRN RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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