Signal Description
MOTOROLA
M68060 USER’S MANUAL
2-15
2.10.2 MC68060 Processor Clock (CLK)
CLK is the synchronous clock of the MC68060. This signal is used internally to clock or
sequence the internal logic of the MC68060 processor and is qualified with CLKEN to clock
all external bus signals.
Since the MC68060 is designed for static operation, CLK can be gated off to lower power
dissipation (e.g., during low-power stopped states). Refer to Section 7 Bus Operation for
more information on low-power stopped states.
2.10.3 Clock Enable (CLKEN)
This input signal is a qualifier for the MC68060 processor clock (CLK) and is provided to sup-
port lower bus frequency MC68060 designs. The internal MC68060 bus interface controller
will sample, assert, negate, or three-state signals (except for BB and TIP which can three-
Table 2-7. PSTx Encoding
Hex
PST4
PST3
PST2
PST1
PST0
Internal Processor Status
$00
00000
Continue Execution in User Mode
$01
00001
Complete 1 Instruction in User Mode
$02
00010
Complete 2 Instructions in User Mode
$03
00011
—
$04
00100
—
$05
00101
—
$06
00110
—
$07
00111
—
$08
01000
Emulator Mode Entry Exception Processing
$09
01001
Complete Not Taken Branch in User Mode
$0A
01010
Complete Not Taken Branch Plus 1 Instruction in User Mode
$0B
01011
IED Cycle of Branch to Vector, Emulator Entry Exception
$0C
01100
—
$0D
01101
Complete Taken Branch in User Mode
$0E
01110
Complete Taken Branch Plus 1 Instruction in User Mode
$0F
01111
Complete Taken Branch Plus 2 Instructions in User Mode
$10
10000
Continue Execution in Supervisor Mode
$11
10001
Complete 1 Instruction in Supervisor Mode
$12
10010
Complete 2 Instructions in Supervisor Mode
$13
10011
—
$14
10100
—
$15
10101
Complete RTE Instruction in Supervisor Mode
$16
10110
Low-Power Stopped State; Waiting for an Interrupt or Reset
$17
10111
MC68060 Is Stopped Waiting for an Interrupt
$18
11000
MC68060 Is Processing an Exception
$19
11001
Complete Not Taken Branch in Supervisor Mode
$1A
11010
Complete Not Taken Branch Plus 1 Instruction in Supervisor Mode
$1B
11011
IED Cycle of Branch to Vector, Exception Processing
$1C
11100
MC68060 Is Halted
$1D
11101
Complete Taken Branch in Supervisor Mode
$1E
11110
Complete Taken Branch Plus 1 Instruction in Supervisor Mode
$1F
11111
Complete Taken Branch Plus 2 Instructions in Supervisor Mode