9/29/95
SECTION 1: OVERVIEW
UM Rev 1
MOTOROLA
M68020 USER’S MANUAL
xv
LIST OF ILLUSTRATIONS (Continued)
Figure
Page
Number
Title
Number
5-24
Write Cycle Flowchart ......................................................................................5-33
5-25
Read-Write-Read Cycles—32-Bit Port .............................................................5-34
5-26
Byte and Word Write Cycles—32-Bit Port ........................................................5-35
5-27
Long-Word Operand Write—8-Bit Port ............................................................5-36
5-28
Long-Word Operand Write—16-Bit Port...........................................................5-37
5-29
Read-Modify-Write Cycle Flowchart .................................................................5-40
5-30
Byte Read-Modify-Write Cycle—32-Bit Port (TAS Instruction) ........................ 5-41
5-31
MC68020/EC020 CPU Space Address Encoding ............................................5-45
5-32
Interrupt Acknowledge Cycle Flowchart ...........................................................5-46
5-33
Interrupt Acknowledge Cycle Timing................................................................5-47
5-34
Autovector Operation Timing ...........................................................................5-49
5-35
Breakpoint Acknowledge Cycle Flowchart .......................................................5-50
5-36
Breakpoint Acknowledge Cycle Timing ............................................................5-51
5-37
Breakpoint Acknowledge Cycle Timing (Exception Signaled) ..........................5-52
5-38
Bus Error without
DSACK1/DSACK0 .............................................................5-57
5-39
Late Bus Error with
DSACK1/DSACK0 ..........................................................5-58
5-40
Late Retry.........................................................................................................5-59
5-41
Halt Operation Timing ......................................................................................5-61
5-42
MC68020 Bus Arbitration Flowchart for Single Request ..................................5-64
5-43
MC68020 Bus Arbitration Operation Timing for Single Request ...................... 5-65
5-44
MC68020 Bus Arbitration State Diagram .........................................................5-67
5-45
MC68020 Bus Arbitration Operation Timing—Bus Inactive .............................5-69
5-46
MC68EC020 Bus Arbitration Flowchart for Single Request ............................. 5-71
5-47
MC68EC020 Bus Arbitration Operation Timing for Single Request ................. 5-72
5-48
MC68EC020 Bus Arbitration State Diagram ....................................................5-73
5-49
MC68EC020 Bus Arbitration Operation Timing—Bus Inactive ........................ 5-75
5-50
Interface for Three-Wire to Two-Wire Bus Arbitration ......................................5-76
5-51
Initial Reset Operation Timing ..........................................................................5-77
5-52
RESET Instruction Timing ................................................................................5-78
6-1
Reset Operation Flowchart ..............................................................................6-5
6-2
Interrupt Pending Procedure ............................................................................6-12
6-3
Interrupt Recognition Examples .......................................................................6-13
6-4
Assertion of
IPEND (MC68020 Only) ...............................................................6-14
6-5
Interrupt Exception Processing Flowchart ........................................................6-15
6-6
Breakpoint Instruction Flowchart ......................................................................6-18
6-7
RTE Instruction for Throwaway Four-Word Frame ..........................................6-20
6-8
Special Status Word Format ............................................................................6-22
7-1
F-Line Coprocessor Instruction Operation Word..............................................7-3
7-2
Asynchronous Non-DMA M68000 Coprocessor Interface Signal Usage ......... 7-5
7-3
MC68020/EC020 CPU Space Address Encodings ..........................................7-6
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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