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| 型號(hào)： | MC68020EH20E |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 104/306頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT 33MHZ 132-PQFP |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 系列： | M680x0 |
| 處理器類型： | M680x0 32-位 |
| 速度： | 20MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 132-BQFP 緩沖式 |
| 供應(yīng)商設(shè)備封裝： | 132-PQFP（24.13x24.13） |
| 包裝： | 托盤 |
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MOTOROLA
M68020 USER’S MANUAL
7- 39
The write to previously evaluated effective address primitive uses the CA and PC bits as
described in 7.4.2 Coprocessor Response Primitive General Format.
The length field of the primitive format specifies the length of the operand in bytes. The
MC68020/EC020 transfers operands of 0–255 bytes in length.
When the main processor receives this primitive during the execution of a general
category instruction, it transfers an operand from the operand CIR to an effective address
specified by a temporary register within the MC68020/EC020. When a previous primitive
for the current instruction has evaluated the effective address, this temporary register
contains the evaluated effective address. Primitives that store an evaluated effective
address in a temporary register of the main processor are the evaluate and transfer
effective address, evaluate effective address and transfer data, and transfer multiple
coprocessor registers primitive. If this primitive is used during an instruction in which the
effective address specified in the instruction operation word has not been calculated, the
effective address used for the write is undefined. Also, if the previously evaluated effective
address was register direct, the address written to in response to this primitive is
undefined.
The function code value during the write operation indicates either supervisor or user data
space, depending on the value of the S-bit in the MC68020/EC020 SR when the
processor reads this primitive. While a coprocessor should request writes to only alterable
effective addressing modes, the MC68020/EC020 does not check the type of effective
address used with this primitive. For example, if the previously evaluated effective address
was PC relative and the MC68020/EC020 is at the user privilege level (S = 0 in SR), the
MC68020/EC020 writes to user data space at the previously calculated program relative
address (the 32-bit value in the temporary internal register of the processor).
Operands longer than four bytes are transferred in increments of four bytes (operand
parts) when possible. The main processor reads a long-word operand part from the
operand CIR and transfers this part to the current effective address. The transfers
continue in this manner using ascending memory locations until all of the long-word
operand parts are transferred, and any remaining operand part is then transferred using a
one-, two-, or three-byte transfer as required. The operand parts are stored in memory
using ascending addresses beginning with the address in the MC68020/EC020 temporary
register, which is internal to the processor and not for user use.
The execution of this primitive does not modify any of the registers in the
MC68020/EC020 programming model, even if the previously evaluated effective address
mode is the predecrement or postincrement mode. If the previously evaluated effective
addressing mode used any of the MC68020/EC020 internal address or data registers, the
effective address value used is the final value from the preceding primitive. That is, this
primitive uses the value from an evaluate and transfer effective address, evaluate effective
address and transfer data, or transfer multiple coprocessor registers primitive without
modification.
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