參數(shù)資料
型號: MC56F8025VLD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BCB, LQFP-44
文件頁數(shù): 74/161頁
文件大?。?/td> 2160K
代理商: MC56F8025VLD
56F8035/56F8025 Data Sheet, Rev. 6
2
Freescale Semiconductor
Document Revision History
Version History
Description of Change
Rev. 0
Initial public release.
Rev. 1
In Table 5-3, changed the ITCN_BASE address from $00 F060 (incorrect value) to
$00 F0E0 (the correct value).
In Table 10-4, added an entry for flash data retention with less than 100 program/erase
cycles (minimum 20 years).
In Table 10-6, changed the device clock speed in STOP mode from 8MHz to 4MHz.
In Table 10-12, changed the typical relaxation oscillator output frequency in Standby mode
from 400kHz to 200kHz.
Changed input propagation delay values in Table 10-20 as follows:
Old values: 1
μs typical, 2 μs maximum
New values: 35 ns typical, 45 ns maximum
Rev. 2
In Table 10-19, changed the maximum ADC internal clock frequency from 8MHz to
5.33MHz.
Replaced the case outline schematics in Figure 11-2, Figure 11-3, and Figure 11-4.
Rev. 3
Added the following note to the description of the TMS signal in Table 2-3:
Note:
Always tie the TMS pin to VDD through a 2.2K resistor.
Rev. 4
Changed the VBA register reset value and updated the footnote in Section 5.6.8.
Changed the STANDBY > STOP IDD values in Table 10-6 as follows:
Typical: was 290
μA, is 540μA
Maximum: was 390
μA, is 650μA
Changed the POWERDOWN IDD values in Table 10-6 as follows:
Typical: was 190
μA, is 440μA
Maximum: was 250
μA, is 550μA
Changed footnote 1 in Table 10-12 (was “Output frequency after application of 8MHz trim
value, at 125°C.”, is “Output frequency after application of factory trim”).
Deleted the text “at 125°C” from Figure 10-5.
Changed the maximum input offset voltage in Table 10-20 (was +/- 20 mV, is ±35 mV).
Rev. 5
In Table 2-3, change VCAP value from 4.7μF to 2.2μF.
Fixed miscellaneous typos.
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