參數(shù)資料
型號： MC56F8025VLD
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP44
封裝： 10 X 10 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BCB, LQFP-44
文件頁數(shù)： 153/161頁
文件大?。?/td> 2160K
代理商： MC56F8025VLD
Register Descriptions
56F8035/56F8025 Data Sheet, Rev. 6
Freescale Semiconductor
91
6.3.10.9
Quad Timer A, Channel 0 Clock Enable (TA0)—Bit 0
0 = The clock is not provided to the Timer A0 module (the Timer A0 module is disabled)
1 = The clock is enabled to the Timer A0 module
6.3.11
Stop Disable Register 0 (SD0)
By default, peripheral clocks are disabled during Stop mode in order to maximize power savings. This
register will allow an individual peripheral to operate in Stop mode. Since asserting an interrupt causes the
system to return to Run mode, this feature is provided so that selected peripherals can be left operating in
Stop mode for the purpose of generating a wake-up interrupt.
For power-conscious applications, it is recommended that only a minimum set of peripherals be
configured to remain operational during Stop mode.
Peripherals should be put in a non-operating (disabled) configuration prior to entering Stop mode unless
their corresponding Stop Disable control is set to 1. Refer to the 56F802x and 56F803x Peripheral
Reference Manual for further details. Reads and writes cannot be made to a module that has its clock
disabled.
Figure 6-12 Stop Disable Register 0 (SD0)
6.3.11.1
Comparator B Clock Stop Disable (CMPB_SD)—Bit 15
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE0
register
6.3.11.2
Comparator A Clock Stop Disable (CMPA_SD)—Bit 14
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE0
register
6.3.11.3
Digital-to-Analog Converter 1 Clock Stop Disable (DAC1_SD)—Bit 13
0 = The clock is disabled during Stop mode
1 = The clock is enabled during Stop mode if the clock to this peripheral is enabled in the SIM_PCE0
register
6.3.11.4
Digital-to-Analog Converter 0 Clock Stop Disable (DAC0_SD)—Bit 12
0 = The clock is disabled during Stop mode
Base + $E
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
CMPB_
SD
CMPA_
SD
DAC1_
SD
DAC0_
SD
0
ADC_
SD
0
I2C_
SD
0
QSCI0_
SD
0
QSPI0_
SD
0
PWM_
SD
Write
RESET
0
00
0
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8025VLDR 制造商:Freescale Semiconductor 功能描述:16-BIT DSC, 56800E CORE, 32KB FLASH, 32MHZ, QFP 44 - Tape and Reel 制造商:Freescale Semiconductor 功能描述:IC DSC 16BIT 32KB FLASH 44LQFP 制造商:Freescale Semiconductor 功能描述:16 BIT DSPHC
MC56F8027 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8027MLH 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT DSPHC 32KB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8027VLD 制造商:Freescale Semiconductor 功能描述:
MC56F8027VLH 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT DSPHC 32KB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
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