• 參數(shù)資料
    型號： MC56F8011VFAE
    廠商： Freescale Semiconductor
    文件頁數(shù)： 66/126頁
    文件大?。?/td> 0K
    描述： IC DIGITAL SIGNAL CTLR 32-LQFP
    標準包裝： 250
    系列： 56F8xxx
    核心處理器： 56800E
    芯體尺寸： 16-位
    速度： 32MHz
    連通性： I²C，SCI，SPI
    外圍設備： POR，PWM，WDT
    輸入/輸出數(shù)： 26
    程序存儲器容量： 12KB（6K x 16）
    程序存儲器類型： 閃存
    RAM 容量： 1K x 16
    電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
    數(shù)據(jù)轉(zhuǎn)換器： A/D 6x12b
    振蕩器型： 內(nèi)部
    工作溫度： -40°C ~ 105°C
    封裝/外殼： 32-LQFP
    包裝： 托盤
    配用： CPA56F8013-ND - BOARD SOCKET FOR MC56F8013
    APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM
    56F8013/56F8011 Data Sheet, Rev. 12
    44
    Freescale Semiconductor
    Part 5 Interrupt Controller (ITCN)
    5.1 Introduction
    The Interrupt Controller (ITCN) module is used to arbitrate between various interrupt requests (IRQs), to
    signal to the 56800E core when an interrupt of sufficient priority exists, and to what address to jump in
    order to service this interrupt.
    5.2 Features
    The ITCN module design includes these distinctive features:
    Programmable priority levels for each IRQ
    Two programmable Fast Interrupts
    Notification to SIM module to restart clocks out of Wait and Stop modes
    Ability to drive initial address on the address bus after reset
    For further information, see Table 4-2, Interrupt Vector Table Contents.
    5.3 Functional Description
    The Interrupt Controller contains registers that allow each of the 46 interrupt sources to be set to one of
    four priority levels (excluding certain interrupts that are of fixed priority). All of the interrupt requests of
    a given level are priority encoded to determine the lowest numerical value of the active interrupt requests
    for that level. Within a given priority level, number 0 is the highest priority and number 45 is the lowest.
    During Wait and Stop modes, the system clocks and the 56800E core are turned off. The ITCN can wake
    up the core and restart system clocks by signaling a pending IRQ to the System Integration Module (SIM)
    to restart the clocks and service the IRQ. An IRQ can only wake up the core if the IRQ is enabled prior to
    FM_CMD
    $14
    Command Register
    $15
    Reserved
    $16
    Reserved
    $17
    Reserved
    FM_DATA
    $18
    Data Buffer Register
    $19
    Reserved
    $1A
    Reserved
    FM_OPT1
    $1B
    Optional Data 1 Register
    Reserved
    FM_TSTSIG
    $1D
    Test Array Signature Register
    Table 4-24 Flash Module Registers Address Map (Continued)
    (FM_BASE = $00 F400)
    Register Acronym
    Address Offset
    Register Description
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    MC56F8013 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
    MC56F8013E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
    MC56F8013MFAE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16Bit DSPHC ANGUILLA RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
    MC56F8013MFAER2 制造商:Freescale Semiconductor 功能描述:16 BIT DSPHC ANGUILLA - Tape and Reel
    MC56F8013PB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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