參數(shù)資料
型號: MC56F8011VFAE
廠商: Freescale Semiconductor
文件頁數(shù): 3/126頁
文件大小: 0K
描述: IC DIGITAL SIGNAL CTLR 32-LQFP
標準包裝: 250
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 12KB(6K x 16)
程序存儲器類型: 閃存
RAM 容量: 1K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 32-LQFP
包裝: 托盤
配用: CPA56F8013-ND - BOARD SOCKET FOR MC56F8013
APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM
56F8013/56F8011 Data Sheet, Rev. 12
100
Freescale Semiconductor
Figure 10-2 Input Signal Measurement References
Figure 10-3 shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached VOL or VOH
Data Invalid state, when a signal level is in transition between VOL and VOH
Figure 10-3 Signal States
10.4 Flash Memory Characteristics
Table 10-9 Flash Timing Parameters
Characteristic
Symbol
Min
Typ
Max
Unit
Program time1
1. There is additional overhead which is part of the programming sequence. See the 56F801X Peripheral User Manual
for details.
Tprog
20
40
μs
Erase time 2
2. Specifies page erase time. There are 512 bytes per page in the Program Flash memory.
Terase
20
ms
Mass erase time
Tme
100
ms
VIH
VIL
Fall Time
Input Signal
Note: The midpoint is VIL + (VIH – VIL)/2.
Midpoint1
Low
High
90%
50%
10%
Rise Time
Data Invalid State
Data1
Data2 Valid
Data
Tri-stated
Data3 Valid
Data2
Data3
Data1 Valid
Data Active
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