
Appendix A Electrical Characteristics
Freescale Semiconductor
MC9S12Q128
621
Rev 1.10
A.5
NVM, Flash, and EEPROM
A.5.1
NVM Timing
The time base for all NVM program or erase operations is derived from the oscillator. A minimum
oscillator frequency fNVMOSC is required for performing program or erase operations. The NVM modules
do not have any means to monitor the frequency and will not prevent program or erase operation at
frequencies above or below the specied minimum. Attempting to program or erase the NVM modules at
a lower frequency a full program or erase transition is not assured.
The Flash program and erase operations are timed using a clock derived from the oscillator using the
FCLKDIV and ECLKDIV registers respectively. The frequency of this clock must be set within the limits
specied as fNVMOP.
The minimum program and erase times shown in Table A-18 are calculated for maximum fNVMOP and maximum fbus. The maximum times are calculated for minimum fNVMOP and a fbus of 2MHz.
Table A-17. PLL Characteristics
Conditions are shown in
Table A-4 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
P Self Clock Mode frequency
fSCM
1
—
5.5
MHz
2
D VCO locking range
fVCO
8
—
50
MHz
3D
Lock Detector transition from Acquisition to Tracking
mode
|trk|
3—4
%(1)
1. % deviation from target frequency
4
D Lock Detection
|Lock|
0
—
1.5
5
D Un-Lock Detection
|unl|
0.5
—
2.5
6D
Lock Detector transition from Tracking to Acquisition
mode
|unt|
6—8
7
C PLLON Total Stabilization delay (Auto Mode) (2)
2. fOSC = 4MHz, fBUS = 16MHz equivalent fVCO = 50MHz: REFDV = #$03, SYNR = #$018, Cs = 4.7nF, Cp = 470pF, Rs = 10K.
tstab
—
0.5
—
ms
8
D PLLON Acquisition mode stabilization delay
tacq
—
0.3
—
ms
9
D PLLON Tracking mode stabilization delay
2tal
—
0.2
—
ms
10
D Fitting parameter VCO loop gain
K1
—
-100
—
MHz/V
11
D Fitting parameter VCO loop frequency
f1
—
60
—
MHz
12
D Charge pump current acquisition mode
| ich |
—
38.5
—
A
13
D Charge pump current tracking mode
| ich |
—
3.5
—
A
14
j1
—
1.1
%
15
j2
—
0.13
%