
Chapter 15 Timer Module (TIM16B6C)
Freescale Semiconductor
MC9S12Q128
441
Rev 1.10
To operate the 16-bit pulse accumulator independently of input capture or output compare 7 and 0
respectively the user must set the corresponding bits IOSx = 1, OMx = 0 and OLx = 0. OC7M7 in the
OC7M register must also be cleared. To enable output action using the OM7 and OL7 bits on the timer
port,the corresponding bit OC7M7 in the OC7M register must also be cleared. The settings for these bits
Table 15-10. The OC7 and OCx event priority
Note: in
Table 15-10, the IOS7 and IOSx should be set to 1
IOSx is the register TIOS bit x,
OC7Mx is the register OC7M bit x,
TCx is timer Input Capture/Output Compare register,
IOCx is channel x,
OMx/OLx is the register TCTL1/TCTL2,
OC7Dx is the register OC7D bit x.
Table 15-8. TCTL1/TCTL2 Field Descriptions
Field
Description
7:2
OMx
Output Mode — These control bits are encoded to specify the output action to be taken as a result of a
successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output tied to
OCx.
Note: To enable output action by OMx bits on timer port, the corresponding bit in OC7M should be cleared.
7:2
OLx
Output Level — These control bits are encoded to specify the output action to be taken as a result of a
successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output tied to
OCx.
Note: To enable output action by OLx bits on timer port, the corresponding bit in OC7M should be cleared.
Table 15-9. Compare Result Output Action
OMx
OLx
Action
0
Timer disconnected from output pin logic
0
1
Toggle OCx output line
1
0
Clear OCx output line to zero
1
Set OCx output line to one
OC7M7=0
OC7M7=1
OC7Mx=1
OC7Mx=0
OC7Mx=1
OC7Mx=0
TC7=TCx
TC7>TCx
TC7=TCx
TC7>TCx
TC7=TCx
TC7>TCx
TC7=TCx
TC7>TCx
IOCx=OC7Dx
IOC7=OM7/O
L7
IOCx=OC7Dx
+OMx/OLx
IOC7=OM7/O
L7
IOCx=OMx/OLx
IOC7=OM7/OL7
IOCx=OC7Dx
IOC7=OC7D7
IOCx=OC7Dx
+OMx/OLx
IOC7=OC7D7
IOCx=OMx/OLx
IOC7=OC7D7