
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Freescale Semiconductor
MC9S12Q128
303
Rev 1.10
10.3.2.8
MSCAN Transmitter Interrupt Enable Register (CANTIER)
This register contains the interrupt enable bits for the transmit buffer empty interrupt ags.
NOTE
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
Read: Anytime
Write: Anytime when not in initialization mode
Table 10-11. CANTFLG Register Field Descriptions
Field
Description
2:0
TXE[2:0]
Transmitter Buffer Empty — This ag indicates that the associated transmit message buffer is empty, and thus
not scheduled for transmission. The CPU must clear the ag after a message is set up in the transmit buffer and
is due for transmission. The MSCAN sets the ag after the message is sent successfully. The ag is also set by
the MSCAN when the transmission request is successfully aborted due to a pending abort request (see
transmit interrupt is pending while this ag is set.
cannot be cleared and no transmission is started.
Read and write accesses to the transmit buffer will be blocked, if the corresponding TXEx bit is cleared
(TXEx = 0) and the buffer is scheduled for transmission.
0 The associated message buffer is full (loaded with a message due for transmission)
1 The associated message buffer is empty (not scheduled)
Module Base + 0x0007
76543210
R
00000
TXEIE2
TXEIE1
TXEIE0
W
Reset:
00000000
= Unimplemented
Figure 10-11. MSCAN Transmitter Interrupt Enable Register (CANTIER)
Table 10-12. CANTIER Register Field Descriptions
Field
Description
2:0
TXEIE[2:0]
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
request.