參數(shù)資料
型號(hào)： MC34982PNA
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Single Intelligent High-Current Self-Protected Silicon High-Side Switch (2.0 mOhm)(單智能大電流帶自保護(hù)功能的硅高端開(kāi)關(guān)（2mOhm）)
中文描述： 單智能大電流的自我保護(hù)硅高邊開(kāi)關(guān)（2.0毫歐）（單智能大電流帶自保護(hù)功能的硅高端開(kāi)關(guān)（2mOhm））
文件頁(yè)數(shù)： 3/24頁(yè)
文件大?。?/td> 771K
代理商： MC34982PNA
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33982
3
TERMINAL FUNCTION DESCRIPTION
Terminal
Terminal
Name
Formal Name
Definition
1
CSNS
Output Current Monitoring
This terminal is used to output a current proportional to the high-side output current and
used externally to generate a ground-referenced voltage for the microcontroller to
monitor output current.
2
WAKE
Wake
This terminal is used to input a logic [1] signal in order to enable the watchdog timer
function. An internal clamp protects this terminal from high damaging voltages when the
output is current limited with an external resistor. This input has an internal passive
pull-down.
3
RST
Reset (Active Low)
This input terminal is used to initialize the device configuration and fault registers, as
well as place the device in a low current sleep mode. The terminal also starts the
watchdog timer when transitioning from logic LOW to logic HIGH. This terminal should
not be allowed to be logic HIGH until V
DD
is in regulation. This terminal has an internal
passive pull-down.
4
IN
Serial Input
The Input terminal is used to directly control the output. This input has an internal active
pull-down and requires CMOS logic levels. This input may be configured via SPI.
5
FS
Fault Status (Active Low)
This is an open drain configured output requiring an external pull-up resistor to V
DD
for
fault reporting. When a device fault condition is detected, this terminal is active LOW.
Specific device diagnostic faults are reported via the SPI SO terminal.
6
FSI
Fail-Safe Input
The value of the resistance connected between this terminal and ground determines
the state of the output after a watchdog timeout occurs. Depending on the resistance
value, either the output is OFF or ON. When the FSI terminal is connected to GND, the
watchdog circuit and fail-safe operation are disabled. This terminal incorporates an
active internal pull-up.
7
CS
Chip Select (Active Low)
This is an input terminal connected to a chip select output of a master microcontroller
(MCU). The MCU determines which device is addressed (selected) to receive data by
pulling the
CS
terminal of the selected device logic LOW, enabling SPI communication
with the device. Other
unselected
devices on the serial link having their
CS
terminals
pulled up logic HIGH disregard the SPI communication data sent.
8
SCLK
Serial Clock
This input terminal is connected to the MCU providing the required bit shift clock for SPI
communication. It transitions one time per bit transferred at an operating frequency,
f
SPI
, defined by the communication interface.
The 50 percent duty cycle CMOS-level
serial clock signal is idle between command transfers. The signal is used to shift data
into and out of the device.
CSNS
WAKE
IN
FS
FSI
CS
SCLK
RST
SI
V
DD
SO
NC
1
11
10
9
8
7
6
5
4
3
2
HS
HS
16
15
V
PWR
Transparent Top View of Package
14
GND
13
12
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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