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參數(shù)資料
| 型號： | MC33298P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | OCTAL SERIAL SWITCH (SPI Input/Output) |
| 中文描述： | 1 A 8 CHANNEL, SIPO BASED PRPHL DRVR, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 21/24頁 |
| 文件大?。?/td> | 280K |
| 代理商： | MC33298P |
MC33298
21
MOTOROLA ANALOG IC DEVICE DATA
SPI TRANSFER LOOP
LDX
#$07
;Set the number of Read/Shift cycles.
LOOP
ASL
DATAIN
;Shift a Zero into LSB of DATAIN and ASL other bits.
ASL
DTOUT
;Test value currently in MSB of DTOUT.
BCS
DOONE
;
BCLR
7,PORTA
;MSB was Zero, so clear DATA OUT bit.
JMP
GOON
DOONE
BSET
7,PORTA
;MSB was One, so set the DATA OUT bit.
GOON
BSET
6,PORTA
;Set the SCLK. Serial Output pin of the MC33298 changes state on the rising edge of the SCLK.
Read the next bit coming from the MC33298.
BRCLR
0,PORTA,
WZZER0
;Read the bit and branch if Zero. LSB of DATAIN is already cleared due to the ASL above.
BSET
0,DATAIN
;Bit was One. Set the next bit in DATAIN.
WZZER0
BCLR
6,PORTA
;Clear SCLK. Falling edge causes the MC33298 to read the next bit from the MCU.
DECX
BPL
LOOP
;Continue to loop eight times until the SPI transfer is complete.
BSET
5,PORTA
;Transfer control signal to output transistors.
ESTABLISH A BRIEF DELAY
LDA
#16
PAUSE
DECA
;3 Clock cycles
BNE
PAUSE
;3 Clock cycles
BCLR
5,PORTA
;Transfer output status to Serial Register.
JSR
FLTCHK
;Jump to Fault Check subroutine.
JSR
DLY
;Delay 1/T msec
BSET
5,PORTA
;Deselect the MC33298.
BRA
TOP
;Return to top of loop.
SUBROUTINE TO CHECK FOR FAULTS
FLTCHK
BCLR
1,PORTA
;CLR the Fault pin.
LDA
DATAIN
CMP
VALUE
;Check for Faults.
BEQ
NOFLT
;If there is no Fault, continue.
BSET
1,PORTA
;Activate Fault LED.
NOFLT
RTS
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