參數(shù)資料
型號(hào)： MC2800
廠商： Motorola, Inc.
英文描述： FSK FM IF Receiver(FSK FM IF 接收器)
中文描述： FSK信號(hào)調(diào)頻（FSK信號(hào)調(diào)頻中頻接收器中頻接收機(jī)）
文件頁(yè)數(shù)： 16/28頁(yè)
文件大?。?/td> 473K
代理商： MC2800
MC2800
16
MOTOROLA RF/IF DEVICE DATA
MC2800 Application Board
The typical application circuit of MC2800 is shown in
Figure 5. The performance of the system kit consisting of the
MC2800, MC68175 and MC68HC705L32 is measured. The
system has a typical sensitivity of –115 dBm @ Phase A.
Table 1 shows the sensitivity measurements of the system at
different symbol rates along with the Symbol Rate Filter
(SRF) filter selections. The test input to the MC2800 is a
single message of 12 characters. The first two columns of
Table 1 show the SRF’s R1 and R2 conditions during
synchronization. The third and fourth columns show the R1
and R2 conditions during data sampling. In operation, the
original digital baseband data is encoded by the Encoder
Software in the computer before this encoded message is
sent out via the Data Acquisition card (DAQ) to the signal
generator HP8657B. The MC2800 receives the modulated
signal from the HP8657B and then converts it into baseband
data D1 and D2. When retrieving data from Pins D1 and D2,
it is essential to observe the timing requirements for the EN
and CL signals. This is illustrated in EN and CL Timing
Requirements. The computer at the other end then retrieves
the D1 and D2 data through the L32EVS board and displays
it in the HC05 Pager Development Board. The test setup of
this system measurement is shown in Figure 6.
With the input frequency at 17.9 MHz the input impedance
of the mixer is measured to be 2.1k–j2.67 k
. The input
impedance does not vary significantly with the supply voltage
and frequency of interest. Figure 7 shows the input
impedance of the mixer over a range of frequencies in the
Smith Chart. From the Smith Chart, the matching network
connecting between the 50
signal generator and the
MC2800 mixer is worked out to be consisting of a shunt
inductor of 3.8
μ
H and a series capacitor of 19 pF. A varicap
of 10 to 90 pF is selected for the series capacitor as this will
make the fine tuning of the input stage easier. The other input
to the mixer is internally connected to a Local Oscillator (LO).
The LO has a Colpitts amplifier which amplifies the external
crystal frequency of 17.445 MHz. The natural oscillation
frequency of the crystal is not exactly 17.445 MHz, therefore
the capacitor C4 is set to 47 pF and the varicap C18 is
selected to have a range of 6.0 to 45 pF for making sure that
the LO can oscillate at 17.445 MHz. The conversion voltage
gain of the mixer is about 20 dB @ –110 dBm. Table 2 shows
the mixer gain with different input signal levels. After the input
signal is amplified and down converted to 455 kHz, it is then
filtered before entering the amplifier 1st IF Amp. The voltage
gain of this amplifier is measured to be 40 dB. This is shown
in Figure 8. From the first stage of amplification the input
signal strength is also detected and it can be monitored at the
RSSI Pin. The relationship between the input signal strength
and the RSSI output is shown in Figure 9. In applications
where component cost is critical, the second 455 kHz
ceramic filter may be replaced by an LC
π
network. This is
shown in Figure 10. The 1.0
μ
F capacitors are used for
blocking dc voltages. The network consisting of 560 pF
capacitors and the 470
μ
H inductor acts as both a low pass
filter centered at 455 kHz and a matching between the first
amplifier output and the second amplifier input. The output
resistance of the first amplifier is 1.1 k
and the input
resistance of the second amplifier is 1.5 k
. Based on the
setup as shown previously in Figure 6, the system
performance of the MC2800 (one 455 kHz ceramic filter plus
one LC network combination) together with the MC68175
and the MC68HC705L32 is measured and the test result is
tabulated in Table 3.
Coming back to the device MC2800, the demodulator is
coilless and it does not need any resonator. The external
resistor connected to the pin Bias Ref is used to give the
reference bias loop current for the demodulator. The
frequency response of the demodulator is measured and it is
shown in Figure 11. At the Demodulator Output (Det Out Pin)
a capacitor is used to decouple the high frequency noise.
Figure 12 shows the differences of the signal measured at
this pin with different values of capacitors used. This
highlights the importance in the selection of this capacitor
value. If this value is too small then the SINAD will be very
poor and hence the sensitivity will be very bad. If it is too big
then the high frequency contents in the step input signal will
be decoupled and this will make the decoding very difficult
after analog to digital conversion. The SRF filter is a two pole
active filter. The filter characteristics are plotted in Figure 14
and Figure 15 for which the selections of R1 = 0 and R2 = 1
are used during measurements. R1 and R2 are used to
select the amount of resistors in the filter. The four level Data
Slicer converts the analog signal into D1 and D2 digital
outputs. This A–D conversion is best illustrated by the plots
in Figures 16 and 17. A brief outline of the A–D conversion
can be found in Data Slicer A/D Conversion. Figure 22 shows
how the MC2800 is connected to the decoding device
(MC68175) which is used after analog to digital conversion.
The interface between the two devices is tabulated in Table 6.
The operating procedure is also outlined.
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