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參數(shù)資料
| 型號： | MC145745FW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 調制器/解調器 |
| 英文描述： | V.21/V.23 Telemeter Modem |
| 中文描述： | 1.2 kbps DATA, MODEM, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 172K |
| 代理商： | MC145745FW |
MC145745
MOTOROLA
11
SCP REGISTER MAP
The MC145745 register map is shown in Table 2. Seven of
the 4–bit wide byte registers (BR) are provided in the register
block. According to these published specifications, BR signi-
fies each register and the address of SCP data. R/W is the
read/write register, and RO is read only. If there is a high to
low pulse on the RESET pin or the power supply turns off,
this register returns to the default state.
The default condition that occurs after a power reset is as
follows.
BR0
BR1
V.23 Receive, Transmit Enable
DTMF CDON = 30 ms, DTMF CDOFF = 25 ms
FSK CDON = 450 ms, FSK CDOFF = 30 ms
FSK Mode
AGC Range = Maximum,
Carrier Detect Level: High
Transmission Gain = Maximum
DTMF Transmission: 941 Hz + 1633 Hz
DTMF Reception: Unknown
BR2
BR3
BR4
BR5
BR6
Table 2. SCP Register Map
Register
b3 (Bit 3: MSB)
b2 (Bit 2)
b1 (Bit1)
b0 (Bit 0: LSB)
BR0 (R/W)
Modem Choice
FSK Channel
Transmission Enable
0
V.23
V.21: Answer
V.23: Receive
Enable
1
V.21
V.21: Originate
V.23: Transmit
Disable
BR1 (R/W)
FSK CDT2
FSK CDT1
DTMF CDT2
DTMF CDT1
TCDON
b3=0, b2=0 : 450 ms
b3=0, b2=1 : 15 ms
b3=1, b2=0 : 15 ms
b3=1, b2=1 : 75 ms
TCDOFF
b3=0, b2=0 : 30 ms
b3=0, b2=1 : 30 ms
b3=1, b2=0 : 15 ms
b3=1, b2=1 : 10 ms
TCDON
b1=0, b0=0 : 30 ms
b1=0, b0=1 : 35 ms
b1=1, b0=0 : 45 ms
TCDOFF
b1=0, b0=0 : 25 ms
b1=0, b0=1 : 35 ms
b1=1, b0=0 : 25 ms
BR2 (R/W) (see Table 3)
Function Mode 4
Function Mode 3
Function Mode 2
Function Mode 1
BR3 (R/W)
AGC Range 2
AGC Range 1
Carrier Detect Level 1
Test
0
B3=0, b2=0 : – 5 to + 20 dB
B3=0, b2=1 : – 5 to + 15 dB
High Level
(Set when VCC = 5 V)
Normal
1
b3=1, b2=0 : – 5 to + 10 dB
b3=1, b2=1 : – 5 to + 5 dB
Low Level
(Set when VCC = 3.6 V)
Test Mode
BR4 (R/W) (see Table 4)
Transmission Gain 4
Transmission Gain 3
Transmission Gain 2
Transmission Gain 1
BR5 (R/W) (see Table 5)
Tone Transmission 4
Tone Transmission 3
Tone Transmission 2
Tone Transmission 1
BR6 (RO) (see Table 5)
DTMF Reception 4
DTMF Reception 3
DTMF Reception 2
DTMF Reception 1
NOTES:
1. BR0 (b0) is a non–working bit.
2. DTMF Loopback data is entered into BR5 and output from the parallel port.
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