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參數(shù)資料
| 型號(hào)： | MC145162D1 |
| 廠商： | MOTOROLA INC |
| 元件分類： | XO, clock |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 85 MHz, PDSO16 |
| 封裝： | SOG-16 |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 223K |
| 代理商： | MC145162D1 |
MC145162
MC145162–1
4
MOTOROLA
SWITCHING CHARACTERISTICS
(TA = 25
°
C, CL = 50 pF)
Symbol
b l
Characteristic
i i
Figure
No.
VDD
Guaranteed Limit
U i
Unit
Min
Max
tTLH
Output Rise Time
1
2.5
5.5
—
—
200
100
ns
tTHL
Output Fall Time
1
2.5
5.5
—
—
200
100
ns
tr, tf
Input Rise and Fall Time
OSCin
2
2.5
5.5
—
—
5.0
4.0
μ
s
tw
Input Pulse Width
CLK and ENB
3
2.5
5.5
80
60
—
—
ns
fmax
Input Frequency
Input = Sine Wave @
≥
200 mV p–p
for MC145162
Input = Sine Wave @
≥
250 mV p–p
for MC145162–1
OSCin
fin–R, fin–T
fin–R, fin–T
2.5 – 5.5
2.5 – 5.5
2.5 – 5.5
—
—
—
16
60
85
MHz
tst
tsu
Minimum Start–Up Time
10
ms
Setup Time
DATA to CLK
ENB to CLK
5
2.5
5.5
100
200
—
—
ns
th
Hold Time
CLK to DATA
5
3.0
5.0
80
40
—
—
ns
trec
Recovery Time
ENB to CLK
5
3.0
5.0
80
40
—
—
ns
tsu1
th1
f
Setup Time
ENB to CLK
4
2.5 – 5.5
80
—
ns
Hold Time
CLK to ENB
4
2.5 – 5.5
600
—
ns
Phase Detector Frequency
dc
12.5
kHz
fMCUCLK
Output Clock Frequency
(OSCin
MCUCLK
3)
dc
5.33
MHz
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