- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371013 > MC145156-2 (Motorola, Inc.) PLL Frequency Synthesizer(PLL頻率合成器) PDF資料下載
參數(shù)資料
| 型號： | MC145156-2 |
| 廠商： | Motorola, Inc. |
| 英文描述： | PLL Frequency Synthesizer(PLL頻率合成器) |
| 中文描述： | 鎖相環(huán)頻率合成器（PLL頻率合成器） |
| 文件頁數(shù)： | 19/26頁 |
| 文件大?。?/td> | 423K |
| 代理商： | MC145156-2 |
MC145151–2 through MC145158–2
MOTOROLA
19
FREQUENCY CHARACTERISTICS
(Voltages References to VSS, CL = 50 pF, Input tr = tf =10 ns unless otherwise indicated)
VDD
V
– 40
°
C
25
°
C
85
°
C
Symbol
Parameter
Test Condition
Min
Max
Min
Max
Min
Max
Unit
fi
Input Frequency
(fin, OSCin)
R
≥
8, A
≥
0, N
≥
8
Vin = 500 mV p–p
ac coupled sine wave
3
5
9
—
—
—
6
15
15
—
—
—
6
15
15
—
—
—
6
15
15
MHz
R
≥
8, A
≥
0, N
≥
8
Vin = 1 V p–p ac coupled
sine wave
3
5
9
—
—
—
12
22
25
—
—
—
12
20
22
—
—
—
7
20
22
MHz
R
≥
8, A
≥
0, N
≥
8
Vin = VDD to VSS
dc coupled square wave
3
5
9
—
—
—
13
25
25
—
—
—
12
22
25
—
—
—
8
22
25
MHz
NOTE: Usually, the PLL’s propagation delay from fin to MC plus the setup time of the prescaler determines the upper frequency limit of the system.
The upper frequency limit is found with the following formula: f = P/(tP + tset) where f is the upper frequency in Hz, P is the lower of the dual
modulus prescaler ratios, tP is the fin to MC propagation delay in seconds, and tset is the prescaler setup time in seconds.
For example, with a 5 V supply, the fin to MC delay is 70 ns. If the MC12028A prescaler is used, the setup time is 16 ns. Thus, if the 64/65
ratio is utilized, the upper frequency limit is f = P/(tP + tset) = 64/(70 + 16) = 744 MHz.
VH= High Voltage Level.
VL= Low Voltage Level.
* At this point, when both fR and fV are in phase, the output is forced to near mid–supply.
NOTE: The PDout generates error pulses during out–of–lock conditions. When locked in phase and frequency the output is high
and the voltage at this pin is determined by the low–pass filter capacitor.
fR
REFERENCE
OSC
÷
R
fV
FEEDBACK
(fin
÷
N)
PDout
φ
R
φ
V
LD
*
VH
VL
VH
VL
VH
HIGH IMPEDANCE
VH
VL
VH
VL
VH
VL
VL
Figure 9. Phase Detector/Lock Detector Output Waveforms
相關PDF資料 |
PDF描述 |
|---|---|
| MC145157-2 | PLL Frequency Synthesizer(PLL頻率合成器) |
| MC145158-2 | PLL Frequency Synthesizer(PLL頻率合成器) |
| MC145158DW | Serial-Input PLL Frequency Synthesizer |
| MC145158P2 | Parallel-Input PLL Frequency Synthesizer |
| MC145158FN | Non-inverting Dual High-Speed MOSFET Drivers with Internal Regulator 8-PDIP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC145158-2 | 制造商:Motorola Inc 功能描述: |
| MC145158DW2 | 功能描述:IC SER-IN PLL FREQ SYNTH 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| MC145158DW2R2 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| MC145159FN1R2 | 制造商:Motorola Inc 功能描述: |
| MC145159P1 | 制造商:Motorola Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。