參數(shù)資料
型號: MC145152P2
廠商: MOTOROLA INC
元件分類: XO, clock
英文描述: CAP .22F 5.5V GOLD SD VERTICAL
中文描述: PLL FREQUENCY SYNTHESIZER, 22 MHz, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 8/36頁
文件大小: 718K
代理商: MC145152P2
MC145151–2 through MC145158–2
8
MOTOROLA
Figure 2. 666–Channel, Computer–Controlled, Mobile Radiotelephone Synthesizer
for 800 MHz Cellular Radio Systems
LOCK DETECT SIGNAL
R1
+
RECEIVER FIRST L.O.
825.030
844.980 MHz
(30 kHz STEPS)
MC12017
÷
64/65 PRESCALER
NOTE 6
MC145152–2
NOTE 5
MC
LD
A0
A5
N9
OSCin
VDD
VSS
OSCout
RA2
RA1
φ
R
φ
V
fin
VCO
RA0
N0
+ V
R1
R2
C
R2
C
“1”
“1”
“1”
NO CONNECTS
CHANNEL PROGRAMMING
NOTES:
1. Receiver 1st I.F. = 45 MHz, low side injection; Receiver 2nd I.F. = 11.7 MHz, low side injection.
2. Duplex operation with 45 MHz receiver/transmit separation.
3. fR = 7.5 kHz;
÷
R = 2048.
4. Ntotal = N
64 + A = 27501 to 28166; N = 429 to 440; A = 0 to 63.
5. MC145158–2 may be used where serial data entry is desired.
6. High frequency prescalers (e.g., MC12018 [520 MHz] and MC12022 [1 GHz]) may be used for higher frequency VCO and fref
implementations.
7. The
φ
R and
φ
V outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop — Low–Pass Filter Design page for
additional information. The
φ
R and
φ
V outputs swing rail–to–rail. Therefore, the user should be careful not to exceed the common mode
input range of the op amp used in the combiner/loop filter.
REF. OSC.
15.360 MHz
(ON–CHIP OSC.
OPTIONAL)
X2
X4
NOTE 6
X4
NOTE 6
TRANSMITTER
MODULATION
TRANSMITTER SIGNAL
825.030
844.980 MHz
(30 kHz STEPS)
RECEIVER 2ND L.O.
30.720 MHz
NOTE 7
MC145152–2 Data Sheet Continued on Page 23
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