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參數(shù)資料
| 型號： | MC12181D |
| 廠商： | MOTOROLA INC |
| 元件分類： | XO, clock |
| 英文描述： | 125 - 1000 MHZ FREQUENCY SYNTHESIZER |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1000 MHz, PDSO16 |
| 封裝： | PLASTIC, SO-16 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 110K |
| 代理商： | MC12181D |
MC12181
2
MOTOROLA RF/IF DEVICE DATA
Figure 1. MC12181 Programmable Synthesizer
PROGRAMMABLE
DIVIDER (25 – 40)
DIVIDE BY 8
PRESCALER
PHASE/FREQ
DETECTOR
CHARGE
PUMP
DIVIDE BY 8
PRESCALER
CRYSTAL
OSCILLATOR/BUFFER
DECODE
LOGIC
Fin
Fin
Reset
OSCin
OSCout
Pout
Rout
Do
A
B
C
D
DIVIDE
BY 2
PIN NAMES
Pin No.
Pin
Function
1
OSCin
An external parallel resonant, fundamental crystal is connected between OSCin and OSCout to form an internal
reference crystal oscillator. External capacitors C1 and C2 are required to set the proper crystal load capacitance
and oscillator frequency (Figure 2). For an external reference oscillator, a signal is ac–coupled into the OSCin pin.
In either mode a 50 k
resistor MUST be connected between OSCin and OSCout.
2
OSCout
Oscillator output, for use with an external crystal as shown in Figure 2.
3
VP
Positive power supply for charge pump. VP MUST be greater than or equal to VCC. Bypassing should be placed
as close as possible to this pin and be connected directly to the ground plane.
4
VCC
Positive power supply. Bypassing should be placed as close as possible to this pin and be connected directly to
the ground plane.
5
Do
Single ended phase/frequency detector output. Three–state current sink/source output for use as a loop error
signal when combined with an external low pass filter. The phase/frequency detector is characterized by a linear
transfer function.
6
GND
Ground. This pin should be directly tied to the ground plane.
7
Fin
Prescaler input – The VCO signal is ac–coupled into the Fin Pin.
8
Fin
Complementary prescaler input – This pin should be capacitively coupled to ground.
9
GND
Ground. This pin should be directly tied to the ground plane.
10
Rout
Open emitter test point used to verify proper operation of the reference divider chain. In normal operation this pin
should be left OPEN.
11
Reset
Test pin used to clear the prescalers (Reset = H). When the Reset is in the HIGH state, the charge pump output
is disabled. The Reset input has an internal pulldown. In normal operation it can be left open or tied to ground.
12
Pout
Open emitter test point used to verify proper operation of the programmable divider chain. The output is a
divide–by–2 version of the programmable input to the phase/frequency detector. In normal operation this pin
should be left OPEN.
13
14
15
16
D
C
B
A
Digital control inputs for setting the value of the programmable divider. A is the LSB and D is the MSB. In normal
operation these pins can be tied to VCC and/or ground to program a fixed divide or they can be driven by a CMOS
logic level when used in a programmable mode. There is an internal pull–up resistor to VCC on each input.
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