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參數(shù)資料
| 型號： | MC10H641FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | SINGLE SUPPLY PECL-TTL 1:9 CLOCK DISTRIBUTION CHIP |
| 中文描述： | 10H SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 115K |
| 代理商： | MC10H641FN |
MC10H641 MC100H641
2–5
MOTOROLA
MECL Data
DL122 — Rev 6
VCC Dependence
TTL and CMOS devices show a significant propagation
delay dependence with VCC. Therefore the VCC variation in a
system will have a direct impact on the total skew of the clock
distribution network. When calculating the skew between two
devices on a single board it is very likely an assumption of
identical VCC’s can be made. In this case the number provided
in the data sheet for part–to–part skew would be overly
conservative. By using Figure 4 the skew given in the data
sheet can be reduced to represent a smaller or zero variation
in VCC. The delay variation due to the specified VCC variation
is
≈
270ps. Therefore, the 1ns window on the data sheet can
be reduced by 270ps if the devices in question will always
experience the same VCC. The distribution of the propagation
delay ranges given in the data sheet is actually a composite
of three distributions whose means are separated by the fixed
difference in propagation delay at the typical, minimum and
maximum VCC.
Figure 4.
TPD versus VCC
4.75
VCC (V)
T
–140
4.85
4.95
5.05
5.15
5.25
–100
–60
–20
20
60
100
140
TPLH
TPHL
P
Capacitive Load Dependence
As with VCC the propagation delay of a TTL output is
intimately tied to variation in the load capacitance. The skew
specifications given in the data sheet, of course, assume
equal loading on all of the outputs. However situations could
arise where this is an impossibility and it may be necessary to
estimate the skew added by asymmetric loading. In addition
the propagation delay numbers are provided only for 50pF
loads, thus necessitating a method of determining the
propagation delay for alternative loads.
Figure 5 shows the relationship between the two
propagation delays with respect to the capacitive load on the
output. Utilizing this graph and the 50pF limits the specification
of the H641 can be mapped into a spec for either a different
value load or asymmetric loads.
Figure 5. TPD versus Load
0
CAPACITIVE LOAD (pF)
M
0.75
10
20
30
40
50
60
70
80
90
100
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
TPHL
TPLH
MEASURED
THEORETICAL
Rise/Fall Skew Determination
The rise–to–fall skew is defined as simply the difference
between the TPLH and the TPHL propagation delays. This
skew for the H641 is dependent on the VCC applied to the
device. Notice from Figure 4 the opposite relationship of TPD
versus VCC between TPLH and TPHL. Because of this the
rise–to–fall skew will vary depending on VCC. Since in all
likelihood it will be impossible to establish the exact value for
VCC, the expected variation range for VCC should be used. If
this variation will be the
±
5% shown in the data sheet the
rise–to–fall skew could be established by simply subtracting
the fastest TPLH from the slowest TPHL; this exercise yields
1.41ns. If a tighter VCC range can be realized Figure 4 can be
used to establish the rise–to–fall skew.
Specification Limit Determination Example
The situation pictured in Figure 6 will be analyzed as an
example. The central clock is distributed to two different cards;
on one card a single H641 is used to distribute the clock while
on the second card two H641’s are required to supply the
needed clocks. The data sheet as well as the graphical
information of this section will be used to calculate the skew
between H641a and H641b as well as the skew between all
three of the devices. Only the TPLH will be analyzed, the TPHL
numbers can be found using the same technique. The
following assumptions will be used:
– All outputs will be loaded with 50pF
– All outputs will toggle at 30MHz
– The VCC variation between the two boards is
±
3%
– The temperature variation between the three
devices is
±
15
°
C around an ambient of 45
°
C.
– 500LFPM air flow
The first task is to calculate the junction temperature for the
devices under these conditions. Using the power equation
yields:
PD = ICC (no load) * VCC +
VCC * VS * f * CL * # outputs
= 1.8 * 48mA * 5V + 5V * 3V * 30MHz *
50pF * 9
= 432mW + 203mW = 635mW
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC10H641FNG | 功能描述:轉換 - 電壓電平 5V PECL to TTL 1:9 Clock Driver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC10H641FNR2 | 功能描述:轉換 - 電壓電平 5V PECL to TTL 1:9 RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC10H641FNR2G | 功能描述:轉換 - 電壓電平 5V PECL to TTL 1:9 Clock Driver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC10H642 C57M WAF | 制造商:ON Semiconductor 功能描述: |
| MC10H642FN | 功能描述:時鐘驅(qū)動器及分配 ECL/TTL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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