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參數(shù)資料
| 型號(hào)： | MC1066 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Hex Inverter Buffers/Drivers With Open-Collector High-Voltage Outputs 14-CDIP -55 to 125 |
| 中文描述： | 符合ACPI的SMBus溫度傳感器內(nèi)部和外部二極管輸入 |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 196K |
| 代理商： | MC1066 |
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MC1066
http://onsemi.com
11
REGISTER SET AND PROGRAMMER’S MODEL
MC1066 Command Set
The MC1066 supports four SMBus command protocols.
These are READ_BYTE, WRITE_BYTE, SEND_BYTE,
and RECEIVE_BYTE. See System Management Bus
Specification Rev. 1.0 for details.
Configuration Register (Config), 8–Bits,
Read/Write
Configuration Register (Config)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Mask1
Chip Stop
Reserved
Bit
POR State
Function
Operation
D[7]
0
Interrupt
Mask
(see text)
1 = mask ALERT/
COMP
0 = don’t mask
ALERT/COMP
D[6]
0
Standby
switch
1 = standby,
0 = normal
D[5]—D[0]
0
Reserved —
Always re-
turns zero
when read.
N/A
A/D Conversion Rate Register (CONV_RATE),
8–Bits, Read/Write
A/D Conversion Rate Register (CONV_RATE)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Reserved
MSB
X
LSB
Bit
POR State
Function
Operation
D[7:3]
0
Reserved — Always
returns zero when
read.
N/A
D[2:0]
010b
Conversion rate bits.
See below.
A/D Conversion Rate Selection
D2
D1
D0
Conversion Rate Samples/sec
0
0
0
0.0625
0
0
1
0.125
0
1
0
0.25
0
1
1
0.5
1
0
0
1.0
1
0
1
2.0
1
1
0
4.0
1
1
1
8.0
NOTE:
Conversion rate denotes actual sampling of both internal
andexternal sensors.
Temperature Registers, 8–Bits, Read–Only
(INT_TEMP, EXT_TEMP)
The binary value (2’s complement format) in these two
registers
represents temperature of the internal and external
sensors following a conversion cycle. The registers are
automatically updated in an alternating manner.
Internal Temperature Register (INT_TEMP)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
MSB
x
x
x
x
x
x
LSB
External Temperature Register (EXT_TEMP)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
MSB
x
x
x
x
x
x
LSB
Temperature Threshold Setpoint Registers,
8–Bits, Read–Write (INT_HLIM, INT_LLIM,
EXT_HLIM, EXT_LLIM)
These registers store the values of the upper and lower
temperature setpoints for event detection. The value is in
2’s–complement binary. INT_HLIM and INT_LLIM are
compared with the INT_TEMP value, and EXT_HLIM and
EXT_LLIM are compared with EXT_TEMP. These
registers may be written at any time.
Internal High Limit Setpoint Register (INT_HLIM)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
MSB
x
x
x
x
x
x
LSB
Internal Low Limit Setpoint Register (INT_LLIM)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
MSB
x
x
x
x
x
x
LS
External High Limit Setpoint Register (EXT_HLIM)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
MSB
x
x
x
x
x
x
LSB
External Low Limit Setpoint Register (EXT_LLIM)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
MSB
x
x
x
x
x
x
LSB
NOTE:
POR states:
INT_HLIM
INT_LLIM
EXT_HLIM
EXT_LLIM
01111111b
11001001b
01111111b
11001001b
+127
°
C
—55
°
C
+127
°
C
—55
°
C
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