參數(shù)資料
型號(hào): MC10138L
廠商: ON SEMICONDUCTOR
元件分類: 計(jì)數(shù)器
英文描述: 10K SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16
封裝: CERAMIC, DIP-16
文件頁數(shù): 1/8頁
文件大?。?/td> 113K
代理商: MC10138L
Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10138/D
MC10138
Bi-Quinary Counter
The MC10138 is a four bit counter capable of divide by two, five, or
ten functions. It is composed of four set–reset master–slave flip–flops.
Clock inputs trigger on the positive going edge of the clock pulse.
Set or reset input override the clock, allowing asynchronous “set” or
“clear.” Individual set and common reset inputs are provided, as well
as complementary outputs for the first and fourth bits.
P
D = 370 mW typ/pkg (No Load)
f
tog = 150 MHz typ
t
r, tf = 2.5 ns typ (20%–80%)
DIP PIN ASSIGNMENT
VCC1
Q3
Q2
S3
S2
C2
VEE
VCC2
Q0
Q1
C1
S0
S1
RESET
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
2
LOGIC DIAGRAM
VCC1 = PIN 1; VCC2 = PIN 16; VEE = PIN 8
11
S0
Q0
14
9
12
Clock
Reset
D1
C1
R
Q
S
15
Q'
10
S1
Q1
D1
C2
R
Q
S
13
Q'
D2
C2
7
6
S2
Q2
D1
C2
R
Q
S
4
Q'
C1
5
S3
Q3
3
D1
C2
R
Q'
Q
S
Q
D2
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10138L
CDIP–16
25 Units / Rail
MC10138P
PDIP–16
25 Units / Rail
MC10138FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10138L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10138
AWLYYWW
1
16
MC10138P
AWLYYWW
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