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參數(shù)資料
| 型號(hào)： | MC-458CB641PS |
| 廠商： | NEC Corp. |
| 英文描述： | 8M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE SO DIMM |
| 中文描述： | 800萬字，64位同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器模塊以便內(nèi)存 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 137K |
| 代理商： | MC-458CB641PS |
Data Sheet M14015EJ4V0DS00
6
MC-458CB641ES, 458CB641PS
DC Characteristics (Recommended Operating Conditions unless otherwise noted)
Parameter
Symbol
Test condition
MIN.
MAX.
Unit
Notes
Operating current
I
CC1
Burst length
=
1, t
RC
≥
t
RC(MIN.)
/CAS latency = 2
-A80
440
mA
1
-A10
440
/CAS latency = 3
-A80
440
-A10
440
Precharge standby current in
I
CC2
P
CKE
≤
V
IL(MAX.)
, t
CK
=
15
ns
4
mA
power down mode
I
CC2
PS
CKE
≤
V
IL(MAX.)
, t
CK
=
∞
4
Precharge standby current in
non power down mode
I
CC2
N
CKE
≥
V
IH(MIN.)
, t
CK
=
15
ns, /CS
≥
V
IH(MIN.)
,
Input signals are changed one time during 30
ns.
80
mA
I
CC2
NS
CKE
≥
V
IH(MIN.)
, t
CK
=
∞
, Input signals are stable.
32
Active standby current in
I
CC3
P
CKE
≤
V
IL(MAX.)
, t
CK
=
15
ns
20
mA
power down mode
I
CC3
PS
CKE
≤
V
IL(MAX.)
, t
CK
=
∞
16
Active standby current in
non power down mode
I
CC3
N
CKE
≥
V
IH(MIN.)
, t
CK
=
15
ns, /CS
≥
V
IH(MIN.)
,
Input signals are changed one time during 30
ns.
120
mA
I
CC3
NS
CKE
≥
V
IH(MIN.)
, t
CK
=
∞
, Input signals are stable.
80
Operating current
I
CC4
t
CK
≥
t
CK(MIN.)
, I
O
= 0
mA
/CAS latency = 2
-A80
580
mA
2
(Burst mode)
-A10
440
/CAS latency = 3
-A80
700
-A10
560
CBR (Auto) refresh current
I
CC5
t
RC
≥
t
RC(MIN.)
/CAS latency = 2
-A80
920
mA
3
-A10
920
/CAS latency = 3
-A80
920
-A10
920
Self refresh current
I
CC6
CKE
≤
0.2
V
8
mA
Input leakage current
I
I(L)
V
I
=
0 to 3.6
V,
All other pins not under test =
0 V
–
4
+4
μ
A
Output leakage current
I
O(L)
D
OUT
is disabled, V
O
=
0 to 3.6
V
–1.5
+1.5
μ
A
High level output voltage
V
OH
I
O
=
–
4.0
mA
2.4
V
Low level output voltage
V
OL
I
O
=
+
4.0
mA
0.4
V
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
2
. I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
#
#
#
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| MC-458CB641PS-A10 | 制造商:NEC 制造商全稱:NEC 功能描述:8M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE SO DIMM |
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