參數(shù)資料
型號： MB91F467SAPMC-GSE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù)： 87/144頁
文件大?。?/td> 5502K
代理商： MB91F467SAPMC-GSE2
MB91460S Series
DS07-16617-3E
47
TFIDX00 (Transaction Buffer 00): Address 07251h
TFIDX01 (Transaction Buffer 01): Address 07253h
TFIDX02 (Transaction Buffer 02): Address 07255h
TFIDX03 (Transaction Buffer 03): Address 07257h
TFIDX04 (Transaction Buffer 04): Address 07259h
TFIDX05 (Transaction Buffer 05): Address 0725Bh
TFIDX06 (Transaction Buffer 06): Address 0725Dh
TFIDX07 (Transaction Buffer 07): Address 0725Fh
TFIDX08 (Transaction Buffer 08): Address 07261h
TFIDX09 (Transaction Buffer 09): Address 07263h
TFIDX10 (Transaction Buffer 10): Address 07265h
TFIDX11 (Transaction Buffer 11): Address 07267h
TFIDX12 (Transaction Buffer 12): Address 07269h
TFIDX13 (Transaction Buffer 13): Address 0726Bh
TFIDX14 (Transaction Buffer 14): Address 0726Dh
TFIDX15 (Transaction Buffer 15): Address 0726Fh
IDX[7:0]
Any number between 0 and 255
*Remark: Index is used for read request. Received data from a read request will be stored in an active
Transaction Buffer with matching index.
If there is no active Transaction Buffer with matching index (e.g. by using UNLOCK), the received data is
discarded.
TFADDR00 (Transaction Buffer 00): Address 07270h
TFADDR01 (Transaction Buffer 01): Address 07274h
TFADDR02 (Transaction Buffer 02): Address 07278h
TFADDR03 (Transaction Buffer 03): Address 0727Ch
TFADDR04 (Transaction Buffer 04): Address 07280h
TFADDR05 (Transaction Buffer 05): Address 07284h
TFADDR06 (Transaction Buffer 06): Address 07288h
TFADDR07 (Transaction Buffer 07): Address 0728Ch
TFADDR08 (Transaction Buffer 08): Address 07290h
TFADDR09 (Transaction Buffer 09): Address 07294h
TFADDR10 (Transaction Buffer 10): Address 07298h
TFADDR11 (Transaction Buffer 11): Address 0729Ch
SZ=Word
3
210 local
0123 remote
SZ=Halfword
3
2
1
0 local
2301 remote
76543210
TFIDX00-15
IDX[7]
IDX[6]
IDX[5]
IDX[4]
IDX[3]
IDX[2]
IDX[1]
IDX[0]
R/WR/W
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