參數(shù)資料
型號： MB91F467SAPMC-GSE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù)： 77/144頁
文件大?。?/td> 5502K
代理商： MB91F467SAPMC-GSE2
MB91460S Series
38
DS07-16617-3E
5.3.
Security Vector FSV2
The setting of the Flash Security Vector FSV2 bits [31:0] is responsible for the individual write protection of the
64 Kbytes sectors. It is only evaluated if write protection bit FSV1 [17] is set.
Explanation of the bits in the Flash Security Vector FSV2[31:0]
Note : See section “
Flash access in CPU mode” for an overview about the sector organization of the Flash Memory.
FSV1 bit
Sector
Enable Write
Protection
Disable Write
Protection
Comment
FSV2[0]
SA8
set to “0”
set to “1”
FSV2[1]
SA9
set to “0”
set to “1”
FSV2[2]
SA10
set to “0”
set to “1”
FSV2[3]
SA11
set to “0”
set to “1”
FSV2[4]
SA12
set to “0”
set to “1”
FSV2[5]
SA13
set to “0”
set to “1”
FSV2[6]
SA14
set to “0”
set to “1”
FSV2[7]
SA15
set to “0”
set to “1”
FSV2[8]
SA16
set to “0”
set to “1”
FSV2[9]
SA17
set to “0”
set to “1”
FSV2[10]
SA18
set to “0”
set to “1”
FSV2[11]
SA19
set to “0”
set to “1”
FSV2[12]
SA20
set to “0”
set to “1”
FSV2[13]
SA21
set to “0”
set to “1”
FSV2[14]
SA22
set to “0”
set to “1”
FSV2[15]
SA23
set to “0”
set to “1”
FSV2[31:16]
set to “0”
set to “1”
not available
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