參數(shù)資料
型號(hào): MB91F355APMT
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PQFP176
封裝: 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù): 63/112頁
文件大?。?/td> 1095K
代理商: MB91F355APMT
MB91350A Series
54
2.
External interrupt/NMI control
(1)Description
The external interrupt control unit is the block that controls external interrupt requests input to NMI and INT0-
INT15.
The level can be selected from H, L, rising edge, or falling edge (except for NMI).
(2)Register list
(3)blockdiagram
External interrupt enable register (ENIR)
External interrupt request register (EIRR)
Request level setting register (ELVR)
The above registers (for eight channels) are available in two set; there are a total of 16 channels.
bit
76
5
4
3
2
1
0
EN6
EN7
EN5
EN4
EN3
EN2
EN1
EN0
15
14
13
12
11
10
9
8
ER6
ER7
ER5
ER4
ER3
ER2
ER1
ER0
15
14
13
12
11
10
9
8
LA7
LB7
LB6
LA6
LB5
LA5
LB4
LA4
76
5
4
3
2
10
LA3
LB3
LB2
LA2
LB1
LA1
LB0
LA0
17
INT0
INT15
NMI
8
16
R BUS
Interrupt
request
Interrupt enable register
Gate
Request F/F
Edge detection
circuit
Interrupt source register
Interrupt level setting register
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