
MB91350A Series
18
s HANDLING DEVICES
Preventing Latchup
Latch-up may occur in a CMOS IC if a voltage greater than VCC or less than VSS is applied to an input or output
pin or if an above-rating voltage is applied between VCC and VSS. A latchup,if it occurs, significantly increases
the power supply current and may cause thermal destruction of an element. When you use a CMOS IC, be very
careful not to exceed the maximum rating.
Treatment of Unused Input Pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, for example, using a pull-
up or pull-down resistor.
About power supply pins
In products with multiple Vcc or Vss pins, the pins of the same potential are internally connected in the device
to avoid abnormal operations including latch-up. However you must connect the pins to an external power and
a ground line to lower the electro-magnetic emission level to prevent abnormal operation of strobe signals caused
by the rise in the ground level, and to conform to the total current rating. Make sure to connect Vcc and Vss pins
via the lowest impedance to power lines.
It is also advisable to connect a ceramic bypass capacitor of approximately 0.1
F between VCC and VSS near
this device.
About Crystal oscillator circuit
Noise near the X0, X1, X0A, X1A pin may cause the device to malfunction. Design the circuit board so that X0,
X1, X0A, X1A, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as
close to the device as possible.
It is strongly advisable to design the PC board artwork with the X0, X1, X0A, and X1A pins surrounded by a
ground plane because stable operation can be expected with such a layout.
Notes on Using External Clock
When external clock is selected, supply it to X0 pin generally, and simultaneously the opposite phase clock to
X0 must be supplied to X1 pin. However, in this case the stop mode(oscillator stop mode) must not be used.
(This is because the X1 pin stops at High level output in STOP mode.)
Using an external clock (normal)
Clock control block
Take the oscillation stabilization wait time during Low level input to the INIT pin.
X0
X1
Note: STOP mode (oscillation stop mode) cannot be used.