參數(shù)資料
型號： MB91461PMC-GSE1
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù)： 50/84頁
文件大?。?/td> 2114K
代理商： MB91461PMC-GSE1
MB91460 Series
54
DS07-16602-2E
(Continued)
*1 : The peripheral resources to which RN (Resource Number) is assigned are capable of being DMA transfer
activation sources. In addition, RN has a one-to-one correspondence with an IS (Input Source) of the DMAC
channel control register A(DMACA0 to DMACA4), and the IS (Input Source) can be obtained by representing
RN in a binary number and adding “1” to the head of it.
*2 : Used by REALOS
*3 : ICR23 and ICR47 are interchangeable by setting REALOS bit (address 0C03H ISO[0]).
Interrupt source
Interrupt
number
Interrupt level
Offset
TBR default
address
Resource
number*1
Deci-
mal
Hexa-
decimal
Setting
register
Register
address
System reserved
128
80
ICR56
478H
1FCH
000FFDFCH
System reserved
129
81
1F8H
000FFDF8H
System reserved
130
82
ICR57
479H
1F4H
000FFDF4H
System reserved
131
83
1F0H
000FFDF0H
Real-time clock
132
84
ICR58
47AH
1ECH
000FFDECH
System reserved
133
85
1E8H
000FFDE8H
A/D converter 0
134
86
ICR59
47BH
1E4H
000FFDE4H
14
System reserved
135
87
1E0H
000FFDE0H
System reserved
136
88
ICR60
47CH
1DCH
000FFDDCH
System reserved
137
89
1D8H
000FFDD8H
System reserved
138
8A
ICR61
47DH
1D4H
000FFDD4H
System reserved
139
8B
1D0H
000FFDD0H
Time base overflow
140
8C
ICR62
47EH
1CCH
000FFDCCH
PLL clock gear
141
8D
1C8H
000FFDC8H
DMA controller
142
8E
ICR63
47FH
1C4H
000FFDC4H
Main/sub oscillation stabilization wait
143
8F
1C0H
000FFDC0H
System reserved
144
90
1BCH
000FFDBCH
Used by INT instruction
145
:
255
91
:
FF
1B8H
:
000H
000FFDB8H
:
000FFC00H
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