參數(shù)資料
型號: MB91461PMC-GSE1
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PQFP176
封裝: 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù): 19/84頁
文件大?。?/td> 2114K
代理商: MB91461PMC-GSE1
MB91460 Series
26
DS07-16602-2E
■ MODE SETTING
In the FR family, the mode pins (MD2, MD1, MD0) and the mode register (MODR) are used to set the operating
mode.
1.
Mode pins
The three pins MD2, MD1, MD0 are used to specify the mode vector fetch related settings.
Settings other than shown in the table are not allowed.
* : Always use MD3 with “0”.
Note : The FR family does not support the external mode vector fetch using multiplex bus.
2.
Mode register (MODR)
The data written to the mode register using mode vector fetch is called mode data.
After the mode register (MODR) is set, the device operates according to the operation mode set in this register.
The mode register is set by all reset sources. User programs cannot write data to the mode register.
Rewriting is allowed in the emulator mode. In this case, use an 8-bit length data transfer instruction.
A 16/32-bit length transfer instruction cannot be used for writing.
Description of the mode register is given below.
[Mode register description]
[bit7 to bit3] Reserved bits
Be sure to set these bits to “00000B”.
Operation is not guaranteed when any value other than “00000B” is set.
[bit2] ROMA (Internal enable bit)
The ROMA bit is used to set whether to enable the internal F-bus RAM and F-bus ROM areas.
Note : Use ”0” in MB91461.
Mode pins*
Mode name
Reset vector
access area
Remarks
MD2
MD1
MD0
0
Internal ROM mode vector
Internal
Not allowed
0
1
External ROM mode vector
External
Bus width is set by mode register.
ROMA
Function
Remarks
0
External ROM mode
Internal F-bus RAM becomes valid. The internal ROM area
(40000H to FFFFFH) is used as an external area.
1
Internal ROM mode
Internal F-bus RAM and F-bus ROM become valid.
bit 5
bit 3
bit 4
000
0
bit 7
bit 6
bit 0
bit 2
bit 1
WTH0
ROMA
WTH1
XXXXXXXXB
Initial value
Operation mode setting bits
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