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參數(shù)資料
| 型號(hào)： | MB91354APMT |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 50 MHz, RISC MICROCONTROLLER, PQFP176 |
| 封裝： | 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176 |
| 文件頁數(shù)： | 71/140頁 |
| 文件大?。?/td> | 3803K |
| 代理商： | MB91354APMT |
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MB91350A Series
36
DS07-16503-5E
■ MODE SETTINGS
The FR family uses mode pins (MD2 to MD0) and a mode register (MODR) to set the operation mode.
1.
Mode Pins
The MD2, MD1, and MD0 pins specify how the mode vector fetch is performed.
Values other than those listed in the table are prohibited.
2.
Mode Register (MODR)
The data that is written to the mode register from the address at 000F FFF8H by the mode vector fetch is called
the mode data.
After the mode register (MODR) , has been set, the device operates according to the configured operating mode.
The mode register is set by all of the reset sources. User programs cannot write to the mode register.
Note : No data exists at the address (0000 07FFH) of the mode register in the previous FR family.
[Register description]
[bit7-bit3] Reserved bit
Always set these bits to “00000B”. Operation is not guaranteed if these bits are set to a value other than “00000B”.
[bit2] ROMA (internal ROM enable bit)
The ROMA bit is used to set whether to enable the internal F-bus RAM and F-bus ROM areas.
[bit1, bit0] WTH1, WTH0 (Bus width setting bits)
Used to set the bus width to be used in external bus mode.
In external bus mode, the BW1 and BW0 bits of AMD0 (CS0 area) are set to the value of these bits.
Mode Pins
Mode name
Reset vector access
area
Remarks
MD2
MD1
MD0
0
internal ROM mode vector
Internal
0
1
external ROM mode vector
External
The bus width is specified by the
mode register.
ROMA
Function
Remarks
0
External ROM
mode
Internal F-bus RAM is valid; the area (8 0000H to 10 0000H) of internal ROM is used
as an external area.
1
Internal ROM
mode
Internal F-bus RAM and F-bus ROM are valid.
WTH1
WTH0
function
Remarks
0
8-bit bus width
external bus mode
0
1
16-bit bus width
10
Setting prohibited
1
single chip mode
MODR
Initial Value
000F FFF8H
XXXXXXXXB
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0
ROMA
WTH1
WTH0
Operating mode setting bits
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