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參數(shù)資料
| 型號(hào)： | MB90P623A |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 71/80頁 |
| 文件大?。?/td> | 1304K |
| 代理商： | MB90P623A |
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71
MB90620A Series
Table 14 Logical 2 Instructions (Long Word) [6 Instructions]
Table 15 Sign Inversion Instructions (Byte/Word) [6 Instructions]
Table 16 Normalize Instruction (Long Word) [1 Instruction]
*1: 4 when the contents of the accumulator are all zeroes, 6 + (R0) in all other cases (shift count).
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
R
G
B
Operation
L
H
A
H
I
S
T
N
Z
V
C
RM
W
ANDL
ANDL
A, ear
A, eam
ORL
ORL
A, ear
A, eam
XORL
XORL
A, ea
A, eam
2
2+
2
2+
2
2+
6
7+ (a)
6
7+ (a)
6
7+ (a)
2
0
2
0
2
0
0
(d)
0
(d)
0
(d)
long (A)
←
(A) and (ear)
long (A)
←
(A) and (eam)
long (A)
←
(A) or (ear)
long (A)
←
(A) or (eam)
long (A)
←
(A) xor (ear)
long (A)
←
(A) xor (eam)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
R
R
R
R
R
R
–
–
–
–
–
–
–
–
–
–
–
–
Mnemonic
#
~
R
G
B
Operation
L
H
A
H
I
S
T
N
Z
V
C
RM
W
NEG
A
NEG
NEG
ear
eam
1
2
2+
2
3
5+ (a)
0
2
0
0
0
2
×
(b)
0
byte (A)
←
0 – (A)
byte (ear)
←
0 – (ear)
byte (eam)
←
0 – (eam)
word (A)
←
0 – (A)
X
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
–
*
NEGW A
NEGW ear
NEGW eam
1
2
2+
2
3
5+ (a)
0
2
0
0
2
×
(c)
word (ear)
←
0 – (ear)
word (eam)
←
0 – (eam)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
–
*
Mnemonic
#
~
RG
B
Operation
L
H
A
H
I
S
T
N
Z
V
C
RM
W
NRML A, R0
2
*
1
1
0
long (A)
←
Shift until first digit
is “1”
byte (R0)
←
Current shift count
–
–
–
–
–
–
*
–
–
–
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