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參數(shù)資料
| 型號(hào)： | MB90F654APFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 73/106頁(yè) |
| 文件大?。?/td> | 873K |
| 代理商： | MB90F654APFV |
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MB90650A Series
69
15. Delayed Interrupt Generation Module
The delayed interrupt generation module is used to generate the task switching interrupt. Interrupt requests to
the F2MC-16L CPU can be generated and cleared by software using this module.
(1) Register Details
The DIRR register controls generation and clearing of delayed interrupt requests. Writing “1” to the register
generates a delayed interrupt request. Writing “0” to the register clears the delayed interrupt request. The register
is set to the interrupt cleared state by a reset. Either “0” or “1” can be written to the reserved bits. However,
considering possible future extensions, it is recommended that the set bit and clear bit instructions are used for
register access.
(2) Block Diagram
Address : 00009FH
——————
—
R0
R/W
Initial value
-------0 B
Delayed interrupt generation /release register (DIRR)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
—
: Readable and writable
: Unused
Delayed interrupt generation/release decoder
Interrupt latch
Internal
data
bus
相關(guān)PDF資料 |
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|---|---|
| MB90652APFV | 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100 |
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| MB90662AP-SH | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP64 |
| MB90P663AP-SH | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP64 |
| MB90673PF | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90F804-201PFR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F867APFR-G-SNE1 | 制造商:FUJITSU 功能描述: |
| MB90F867ASPF-GE1 | 制造商:FUJITSU 功能描述:IC 16BIT MCU I2C SMD QFP100 |
| MB90F867ASPFR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F867ASPFR-G-SPE1 | 制造商:FUJITSU 功能描述: |
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