參數資料
型號： MB90F654APFV
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數： 24/106頁
文件大?。?/td> 873K
代理商： MB90F654APFV
MB90650A Series
24
(Continued)
Address
Register
name
Read/
write
Resource name
Initial value
23H
Serial status register 0
SSR0
R/W
UART0
0 0 0 0 1 – 0 0 B
24H
Serial mode control status register 0
SMCS0
R/W
I/O extended serial
interface 0
––––0000 B
25H
Serial mode control status register 0
SMCS0
R/W
0 0 0 0 0 0 1 0 B
26H
Serial data register 0
SDR0
R/W
XXXXXXXXB
27H
Clock division control register
CDCR
R/W
Communications prescaler
0–––1111 B
28H
Serial mode control status register 1
SMCS1
R/W
I/O extended serial
interface 1
––––0000 B
29H
Serial mode control status register 1
SMCS1
R/W
0 0 0 0 0 0 1 0 B
2AH
Serial data register 1
SDR1
R/W
XXXXXXXXB
2BH to 2FH
(Reserved area)
30H
Interrupt/DTP enable register
ENIR
R/W
DTP/external interrupts
00000000 B
31H
Interrupt/DTP source register
EIRR
R/W
0 0 0 0 0 0 0 0 B
32H
Request level setting register
ELVR
R/W
00000000 B
33H
00000000 B
34H to 35H
(Reserved area)
36H
Control status register 1
ADCS1
R/W
A/D converter
00000000 B
37H
Control status register 2
ADCS2
0 0 0 0 0 0 0 0 B
38H
Data register 1
ADCR1
R
XXXXXXXXB
39H
Data register 2
ADCR2
XXXXXXXXB
3AH
D/A converter data register 0
DAT0
R/W
D/A converter
XXXXXXXXB
3BH
D/A converter data register 1
DAT1
R/W
XXXXXXXXB
3CH
D/A control register channel 0
DACR0
R/W
–––––––0 B
3DH
D/A control register channel 1
DACR1
R/W
–––––––0 B
3EH
Clock control register
CLKR
R/W
Clock output control
register
––––0000 B
3FH
(Reserved area)
40H
Reload register lower channel 0
PRLL0
R/W
8/16-bit PPG
XXXXXXXXB
41H
Reload register upper channel 0
PRLH0
R/W
XXXXXXXXB
42H
Reload register lower channel 1
PRLL1
R/W
XXXXXXXXB
43H
Reload register upper channel 1
PRLH1
R/W
XXXXXXXXB
44H
PPG0 operation mode control register
channel 0
PPGC0
R/W
0X000XX1B
45H
PPG1 operation mode control register
channel 1
PPGC1
R/W
0 X000001 B
46H
PPG0, PPG1 output control register
channel 0, channel 1
PPGOE
R/W
0 0000000 B
47H to 4FH
(Reserved area)
50H
Lower compare register channel 0
OCCP0
R/W
16-bit I/O timer output
compare (channel 0 to
channel 3)
XXXXXXXXB
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