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參數(shù)資料
| 型號： | MB90F654APFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 16/106頁 |
| 文件大小： | 873K |
| 代理商： | MB90F654APFV |
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MB90650A Series
17
s
s HANDLING DEVICES
1.
Preventing Latch-up
Latch-up occurs in a CMOS IC if a voltage greater than VCC or less than VSS is applied to an input or output pin
or if the voltage applied between VCC and VSS exceeds the rating.
If latch-up occurs, the power supply current increases rapidly resulting in thermal damage to circuit elements.
Therefore, ensure that maximum ratings are not exceeded in circuit operation.
For the same reason, also ensure that the analog supply voltage does not exceed the digital supply voltage.
2.
Treatment of Unused Pins
Leaving unused input pins unconnected can cause misoperation. Always pull-up or pull-down unused pins.
3.
External Reset Input
To reliably reset the controller by inputting an “L” level to the RST pin, ensure that the “L” level is applied for at
least five machine cycles. Take particular note when using an external clock input.
4.
VCC and VSS Pins
Ensure that all VCC pins are at the same voltage. The same applies for the VSS pins.
5.
Precautions when Using an External Clock
Drive the X0 pin only when using an external clock.
6.
A/D Converter Power Supply and the Turn-on Sequence for Analog Inputs
Always turn off the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (AN0 to AN7) before
turning off the digital power supply (VCC).
When turning the power on or off, ensure that AVRH does not exceed AVCC.
Also, when using the analog input pins as input ports, ensure that the input voltage does not exceed AVCC.
7.
Turn-on Sequence for D/A Converter Power Supply
Always turn on the D/A converter power supply (DVR), after turning off the digital power supply (VCC).
And in the turning off the power supply sequence always turn off the digital power supply (VCC) after turning off
the D/A converter power supply (DVR).
X0
X1
MB90650A Series
Using an external clock
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