參數(shù)資料
型號： MB90F654A
廠商： Fujitsu Limited
英文描述： 16-bit Proprietary Microcontroller
中文描述： 16位微控制器專有
文件頁數(shù)： 56/120頁
文件大?。?/td> 1690K
代理商： MB90F654A
56
MB90650A Series
(2) Output Compare
The output compare consists of two 16-bit compare registers, compare output latches, and control registers.
The modules can invert the output level and generate an interrupt when the 16-bit free-run timer value matches
the compare register value.
The four compare registers can be operated independently.
Each compare register has a corresponding output pin and interrupt flag.
The four compare registers can be paired to control the output pins.
Invert the output pins using the four compare registers.
Initial values can be set for the output pins.
An interrupt can be generated when a compare match occurs.
Register configuration
OCCP0 : 000050
H
OCCP1 : 000052
H
OCCP2 : 000054
H
OCCP3 : 000056
H
OCCP0 : 000051
H
OCCP1 : 000053
H
OCCP2 : 000055
H
OCCP3 : 000057
H
Upper compare register channel 0 to channel 3 (OCCP0 to OCCP3)
Lower compare register channel 0 to channel 3 (OCCP0 to OCCP3)
Compare control status register channel 0 to channel 3 (OCS0 to OCS3)
Initial value
XXXXXXXX
B
—
X
: Unused
: Indeterminate
C15
C14
C13
C12
C11
C10
C09
C08
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
XXXXXXXX
B
C07
C06
C05
C04
C03
C02
C01
C00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
---00000
B
CMOD OTE1
OTE0
OTDI
OTD0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
OCS3 : 00005B
H
OCS1 : 000059
H
Initial value
0000--00
B
ICE0
CST1
CST0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
ICP1
ICP0
ICE1
OCS0 : 000058
H
OCS2 : 00005A
H
—
—
—
—
: Readable and writable
R/W
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