MB90570A/570C Series
DS07-13701-9E
47
(2) Input Capture (ICU)
The input capture (ICU) generates an interrupt request to the CPU simultaneously with a storing operation of
current counter value of the 16-bit free run timer to the ICU data register (IPCP) upon an input of a trigger edge
to the external pin.
There are four sets (four channels) of the input capture external pins and ICU data registers, enabling measure-
ments of maximum of four events.
The input capture has two sets of external input pins (IN0, IN1) and ICU registers (IPCP), enabling measure-
ments of maximum of four events.
A trigger edge direction can be selected from rising/falling/both edges.
The input capture can be set to generate an interrupt request at the storage timing of the counter value of the
16-bit free run timer to the ICU data register (IPCP).
The input compare conforms to the extended intelligent I/O service (EI2OS).
The input capture (ICU) function is suited for measurements of intervals (frequencies) and pulse widths.
Register Configuration
ICU data register ch.0, ch.1 (IPCP0, IPCP1)
Address
Initial value
XXXXXXXXB
CP15
CP14
CP13
CP12
CP11
CP10
CP09
CP08
(IPCP0 low, IPCP1 low)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 0
. ... .... ... ..
RR
R
RR
R
Address
CP07
CP06
CP05
CP04
CP03
CP02
CP01
CP00
(IPCP0 high, IPCP1 high)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15
bit 8
... ... .... ..
R
RR
R
RR
ICU control status register (ICS01)
R/W:Readable and writable
R:Read only
X:Undefined
000051H
000053H
Address
000054H
Initial value
00000000B
ICP1
ICP0
ICE1
ICE0
EG11
EG10
EG01
EG00
(Disabled)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15
bit 8
... ... .... ..
R/W
000050H
000052H
Note: This register holds a 16-bit free run timer value when the valid edge of the corresponding external pin input waveform is
detected. (You can word-access this register, but you cannot program it.)
Initial value
XXXXXXXXB
IPCP0(low):
IPCP1(low):
IPCP0(high):
IPCP1(high):