MB90470 Series
58
10. 16-bit reload timer
The 16-bit reload timer provides a choice of two functions, one is an internal clock countdown synchronized with
any of 3 types of internal clock, and the other is an event count mode that counts down at detection of a given
edge of a pulse input externally. This timer defines an underflow as a transition of the count value from 0000H
to FFFFH. Therefore, an underflow will occur at the count value “reload register setting count
+ 1”. The count
operation includes a choice of reload mode in which the count set value is reloaded at each underflow event,
and one-shot mode in which the count stops at an underflow event. An interrupt can be generated when the
counter reaches an underflow, and the timer is DTC compatible.
(1) Register List
TMCSR (Timer control status registers)
Timer control status register (high)
Timer control status register (low)
16-bit timer register/16-bit reload register
TMR/TMRLR (high)
TMR/TMRLR (low)
0000CBH
Read/write
Default value
0000CAH
Read/write
Default value
0000CDH
Read/write
Default value
0000CCH
Read/write
Default value
(
)
(
)
(
)
(
)
(
)
(
)
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
15
14
13
12
11
10
9
8
(
)
(
)
CSL1
CSL0
MOD2
MOD1
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
(R/W)
( 0 )
76
5
4
3
2
1
0
OUTE
(R/W)
( 0 )
MOD0
OUTL
RELD
INTE
UF
CNTE
TRG
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
15
14
13
12
11
10
9
8
D14
(R/W)
( X )
D15
D13
D12
D11
D10
D09
D08
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
(R/W)
( X )
76
5
4
3
2
1
0
D06
(R/W)
( X )
D07
D05
D04
D03
D02
D01
D00