參數(shù)資料
型號: MB90F377
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁數(shù): 62/140頁
文件大小: 650K
代理商: MB90F377
MB90370/375 Series
62
8.
I
2
C
The I
2
C (Inter IC Bus) interface is a simple structure bidirectional bus consisting of two wires : a serial data line
(SDA) and a serial clock line (SCL) . Among the devices connected with these two wires, information is transmitted
to one another. By recognizing the unique address of each device, it can operate as a transmitting or receiving
device in accordance with the function of each device. Among these devices, the master/slave relation is estab-
lished.
The I
2
C interface can connect two or more devices to the bus provided the upper limit of the bus capacitance
does not exceed 400 pF. It is a full-fledged multi-master bus equipped with collision detection and communication
adjustment procedures designed to avoid the destruction of data if two or more masters attempt to start data
transfer simultaneously.
The communication adjustment procedure permits only one master to control the bus when two or more masters
attempt to control the bus so that messages are not lost or the contents of messages are not changed. Multi-
master means that multiple masters attempt to control the bus simultaneously without losing messages.
This I
2
C interface includes MCU standby mode wake-up function, and a CRC-8 calculator that performs automatic
Packet Error Code (PEC) generation and verification.
(1) Register configuration of I
2
C
(Continued)
I
2
C Bus Control Register (Lower)
I
2
C Bus Control Register (Upper)
I
2
C Bus Status Register (Lower)
I
2
C Bus Status Register (Upper)
I
2
C Data Register
Bit number
IBCRL
Address : 000080
H
Read/write
Initial value
Bit number
IBCRH
Address : 000081
H
Read/write
Initial value
Bit number
IBSRL
Address : 000082
H
Read/write
Initial value
Bit number
IBSRH
Address : 000083
H
Read/write
Initial value
Bit number
IDAR
Address : 000084
H
Read/write
Initial value
R/W
0
R/W
0
R/W
0
R/W
0
7
6
5
4
3
2
1
0
RES
PECE
LBT
WUE
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
15
14
13
12
11
10
9
8
BEIE
R/W
0
BER
SCC
MSS
ACK
GCAA
INTE
INT
R
0
R
0
R
0
R
0
R
0
R
0
R
0
7
6
5
4
3
2
1
0
RSC
R
0
BB
AL
LRB
TRX
AAS
GCA
FBT
R
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
15
14
13
12
11
10
9
8
PMATCH
WUF
TDR
TCR
MTR
STR
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
7
6
5
4
3
2
1
0
D6
R/W
X
D7
D5
D4
D3
D2
D1
D0
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