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MB90370/375 Series
19
I
HANDLING DEVICES
Be sure that the maximum rated voltage is not exceeded (latch-up prevention) .
A latch-up may occur on a CMOS IC if a voltage higher than V
CC
or lower than V
SS
is applied to an input or
output pin other than medium-to-high voltage pins. A latch-up may also occur if a voltage higher than the
rating is applied between V
CC
and V
SS
. A latch-up causes a rapid increase in the power supply current, which
can result in thermal damage to an element. Take utmost care that the maximum rated voltage is not exceeded.
When turning the power on or off to analog circuits, be sure that the analog supply voltages (AV
CC
, CV
CC
, AVR,
CVRH1, CVRH2 and CVRL) and analog input voltage do not exceed the digital supply voltage (V
CC
) .
Stabilize the supply voltages
Even within the operation guarantee range of the V
CC
supply voltage, a malfunction can be caused if the supply
voltage undergoes a rapid change. For voltage stabilization guidelines, the V
CC
ripple fluctuations (P-P value)
at commercial frequencies (50 Hz to 60 Hz) should be suppressed to 10
%
or less of the reference V
CC
value.
During a momentary change such as when switching a supply voltage, voltage fluctuations should also be
suppressed so that the transient fluctuation rate is 0.1 V/ms or less.
Power-on
To prevent a malfunction in the built-in voltage drop circuit, secure 50
μ
s (between 0.2 V and 1.8 V) or more
for the voltage rise time during power-on.
Treatment of unused input pins
An unused input pin may cause a malfunction if it is left open. Every unused input pin should be pulled up or
down.
Treatment of A/D converter, D/A converter and comparator power pin
When the A/D converter, D/A converter and comparator is not used, connect the pins as follows : AV
CC
=
CV
CC
=
V
CC
, AV
SS
=
AVR
=
CV
SS
=
CVRL
=
CVRH1
=
CVRH2
=
V
SS
.
Notes on external clock
When an external clock is used, the oscillation stabilization wait time is required at power-on reset or at
cancellation of sub-clock mode or stop mode. As shown in diagram below, when an external clock is used,
connect only the X0 pin and leave the X1 pin open.
Power supply pins
When a device has two or more V
CC
or V
SS
pins, the pins that should have equal potential are connected within
the device in order to prevent a latch-up or other malfunction. To reduce extraneous emission, to prevent a
malfunction of the strobe signal due to an increase in the group level, and to maintain the local output current
rating, connect all these power supply pins to an external power supply and ground them.
The current source should be connected to the V
CC
and V
SS
pins of the device with minimum impedance. It
is recommended that a bypass capacitor of about 0.1
μ
F be connected near the terminals between V
CC
and V
SS
.
Open
MB90370/375 series
X0
X1