參數(shù)資料
型號(hào)： MB90F372
廠商： Fujitsu Limited
英文描述： 16-bit Proprietary Microcontroller
中文描述： 16位微控制器專有
文件頁數(shù)： 39/140頁
文件大?。?/td> 650K
代理商： MB90F372
MB90370/375 Series
39
I
PERIPHERAL RESOURCES
1.
Low-power Consumption Control Circuit
The MB90370/375 series has the following CPU operating mode selected by the configuration of an operating
clock and clock operation control.
Clock Mode
PLL clock mode
In this mode, a PLL clock that is a multiple of the oscillation clock (HCLK) is used to operate the CPU and
peripheral functions.
Main clock mode
In this mode, the main clock, with the oscillation clock (HCLK) frequency divided by 2 is used to operate
the CPU and peripheral functions. In the main clock mode, the PLL multiplier circuit is inactive.
Sub-clock mode
In this mode, the sub-clock, with the sub-clock (SCLK) frequency divided by 4 is used to operate the CPU
and peripheral functions. In the sub-clock mode, the main clock and PLL multiplier circuit are inactive.
CPU Intermittent Operating Mode
In this mode, the CPU is operated intermittently while high-speed clock pluses are supplied to peripheral func-
tions, thereby reducing power consumption. In this mode, intermittent clock pulses are supplied only to the CPU
while it is accessing a register, internal memory, or peripheral function.
Standby Mode
In this mode, the low-power consumption control circuit stops supplying the clock to the CPU (sleep mode) or
the CPU and peripheral functions (timebase timer mode) or stops the oscillation clock itself (stop mode) , thereby
reducing power consumption.
PLL sleep mode
The PLL sleep mode is activated to stop the CPU operating clock in the PLL clock mode. Components
excluding the CPU operate on the PLL clock.
Main sleep mode
The main sleep mode is activated to stop the CPU operating clock in the main clock mode. Components
excluding the CPU operate on the main clock.
Sub-sleep mode
The sub-sleep mode is activated to stop the CPU operating clock in the sub-clock mode. Components
excluding the CPU operate on the divided-by-four sub-clock.
Timebase timer mode
The timebase timer mode causes the operation of functions, excluding the oscillation clock, timebase timer,
and watch timer, to stop. All functions other than the timebase timer and watch timer are inactivated.
Watch mode and main watch mode
The watch mode and main watch mode operates the watch timer only. The sub-clock operates but the
main clock and PLL multiplier circuit stop.
Stop mode
The stop mode causes the oscillation to stop. All functions are inactivated.
Note : Because the stop mode turns the oscillation clock off, data can be retained by the lowest power consumption.
相關(guān)PDF資料
PDF描述
MB90F372PFF-G 16-bit Proprietary Microcontroller
MB90F377 16-bit Proprietary Microcontroller
MB90F377PFF-G 16-bit Proprietary Microcontroller
MB90F378 16-bit Proprietary Microcontroller
MB90F378PFF-GE1 16-bit Proprietary Microcontroller
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